How to build a chip for functional safety applications.
Stewart Williams, senior technical marketing manager at Synopsys, talks about the consolidation of chips in a vehicle and the impact of 7/5nm on automotive SoC design, how to trade off power, performance, area and reliability, and how ISO 26262 impacts those variables.
100% inspection, more data, and traceability will reduce assembly defects plaguing automotive customer returns.
Engineers are finding ways to effectively thermally dissipate heat from complex modules.
Increased transistor density and utilization are creating memory performance issues.
FPGAs, CPUs, and equipment receive funding in China; 98 startups raise over $2 billion.
Heterogeneous designs and AI/ML processing expose the limitations of existing methodologies and tools.
Suppliers are investing new 300mm capacity, but it’s probably not enough. And despite burgeoning 200mm demand, only Okmetic and new players in China are adding capacity.
100% inspection, more data, and traceability will reduce assembly defects plaguing automotive customer returns.
From low resistance vias to buried power rails, it takes multiple strategies to usher in 2nm chips.
Some of the less common considerations for assessing the suitability of a system for high-performance workloads.
Manufacturing 3D structures will require atomic-level control of what’s removed and what stays on a wafer.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Engineers are finding ways to effectively thermally dissipate heat from complex modules.
Increased transistor density and utilization are creating memory performance issues.
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