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Targeting Redundancy In ICs


Technology developed for one purpose is often applicable to other areas, but organizational silos can get in the way of capitalizing on it until there is a clear cost advantage. Consider memory. All memories are fabricated with spare rows and columns that are swapped in when a device fails manufacturing test. "This is a common method to increase the yield of a device, based on how much memor... » read more

What Designers Need to Know About Error Correction Code (ECC) In DDR Memories


As with any electronic system, errors in the memory subsystem are possible due to design failures/defects or electrical noise in any one of the components. These errors are classified as either hard-errors (caused by design failures) or soft-errors (caused by system noise or memory array bit flips due to alpha particles, etc.). To handle these memory errors during runtime, the memory subsyst... » read more

When You Can’t Afford To Scrimp On System Reliability


Failure happens, whether we like it or not. What’s important is to be prepared for failure to occur, which involves putting in place measures that allow us to quickly address or resolve the problem. But not all failures are created equally. For example, a laptop that you use daily might experience occasional glitches. If it’s well-designed, you can simply reset the machine to get it back to... » read more

Taming Novel NVM Non-Determinism


New memory technologies may have non-deterministic characteristics that add calibration to the test burden — and may require recalibration during their lifetime. Many of these memories are in development as a result of the search for a storage-class memory (SCM) technology that can bridge the gap between larger, slower memories like flash and faster DRAM memory. There are several approache... » read more

Enterprise-Class DRAM Reliability


Brett Murdock, product manager for memory interfaces at Synopsys, examines demand for DDR5 and DDR4 in both on-premise and cloud implementations, what features are available for which versions, how they affect performance and power, how ECC is implemented, and how the data moves throughout these systems. » read more

Automotive Chip Design Workflow


Stewart Williams, senior technical marketing manager at Synopsys, talks about the consolidation of chips in a vehicle and the impact of 7/5nm on automotive SoC design, how to trade off power, performance, area and reliability, and how ISO 26262 impacts those variables. » read more

Logic Chip, Heal Thyself


If a single fault can kill a logic chip, that doesn’t bode well for longevity of complex multi-chip systems. Obsolescence in chips is not just an industry ploy to sell more chips. It is a fact of physics that chips don’t last more than a few years, especially if overheated, and hit with higher voltage than it can stand. The testing industry does a great job finding defects during manufac... » read more

Establishing the Root of Trust for the Internet of Things


The Internet of Things (IoT) is a quickly emerging ecosystem of applications, products and services in which both large and small devices connect to the internet. These new IoT devices will be embedded into diverse applications ranging from home security and home automation to manufacturing—and more. Protecting the data collected from these dispersed IoT endpoints presents a myriad of challen... » read more

Why Auto Designs Take So Long


Designing chips for the automotive market is adding significant overhead, particularly for chips with stringent safety requirements. On the verification side it could result in an additional 6 to 12 months of work. On the design side, developing the same processor in the mobile market would take 6 fewer man months. And when it comes to complex electronic control units (ECUs) or [getkc id="81... » read more

When DDR DRAM Is Right For Automotive Systems


Most of the processors contained within automobiles are relatively small and with modest memory requirements that can be served by SRAM and non-volatile memory. The type of computing, image processing, and graphics displays that are possible with a more powerful CPU connected to DRAM have largely been restricted to the non-safety-critical infotainment system in the vehicle – until now. Advanc... » read more

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