Tech Talk: ISO 26262 Drilldown


ArterisIP’s Kurt Shuler looks at what can go wrong in automotive design, what are the prerequisites for getting the attention of Tier 1 and OEMs, and what’s involved in automotive design at all levels. https://youtu.be/nnjAldn-nKU » read more

Tech Talk: eFPGA Performance Benchmarking


Tony Kozaczuk, director of system architecture at Flex Logix, explains how to avoid bottlenecks and improve throughput and performance in embedded FPGAs. https://youtu.be/dPDylKG7jhA » read more

Tech Talk: Traceability In Functional Safety


Dominik Strasser, vice president of engineering at OneSpin Solutions, talks about the impact of functional safety regulations on liability and traceability in automotive, rail, industrial, nuclear and machinery applications. https://youtu.be/2jWnId8jQJg » read more

Tech Talk: MCU Memory Options


David Eggleston, vice president of embedded memory at GlobalFoundries, talks about the pros and cons of embedded non-volatile memory versus system in package. https://youtu.be/6KoQTFbFVCo » read more

Tech Talk: HBM vs. GDDR6


Frank Ferro, senior director of product management at Rambus, talks about memory bottlenecks and why both GDDR6 and high-bandwidth memory are gaining steam and for which markets. https://youtu.be/CPqdZZooS2g     Related Video GDDR6 – HBM2 Tradeoffs (2019) What type of DRAM works best where. » read more

Tech Talk: Shrink Vs. Package


Andy Heinig, group manager for system integration at Fraunhofer EAS, talks about the tradeoffs between planar design and advanced packaging, including different types of interposers, chiplets and thermal issues. https://youtu.be/1BDqgCujJno » read more

Tech Talk: HW Security


Ben Levine, senior director of product management at Rambus, explains how to minimize the risk of attacks on chip hardware, why design for security is becoming more critical for connected devices, and strategies for making devices less vulnerable. https://youtu.be/twgHcdqvyjU » read more

Tech Talk: eFPGA Timing


Flex Logix's Chen Wang talks about timing for an embedded FPGA and how that differs from ASIC timing. https://youtu.be/n88D1N4IEbs » read more

Tech Talk: FPGA RTL Checking


Tobias Welp, software architect and engineering manager at OneSpin Solutions, explains how to ensure the RTL created by design engineers matches what shows up in an FPGA. https://youtu.be/0N1PDYyq0dY » read more

Tech Talk: Improving Verification


Frank Schirrmeister, senior group director for product management and marketing at Cadence, discusses how to verify different use cases, focusing on software, low-power designs, connectivity, and a variety of end markets. https://youtu.be/gK-0vmIWxJs » read more

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