category: Videos

category: IoT, Security & Automotive

What’s Missing In Verification
By Ed Sperling - 27 Apr, 2011 - Comments: 0

System-Level Design talks with Mentor Graphics, Cadence, and an Accellera member about what's changing in verification--and where the missing pieces are.   [youtube vid=alb3dncca4o] » read more

Verification At 28nm And Beyond
By Ed Sperling - 14 Apr, 2011 - Comments: 0

Low-Power Engineering looks at the challenges ahead in IC verification with Frank Schirrmeister of Synopsys, Ran Avinun of Cadence, Prakash Narain from Real Intent and Lauro Rizzatti from EVE. [youtube vid=bc5IhGrlJo4] » read more

The Future Of EDA…And DAC
By Ed Sperling - 31 Mar, 2011 - Comments: 0

System-Level Design digs into the future of the design automation tools industry and the Design Automation Conference with Cadence's Neil Hand, Atrenta's Mike Gianfagna and Springsoft's Johnson Teng.   [youtube vid=IYA2o0tzOZs] » read more

Billion-Gate Chips
By Ed Sperling - 16 Mar, 2011 - Comments: 0

Low-Power Engineering examines hurdles ranging from power to cost in billion-gate IC designs with Arteris; Jack Browne, senior vice president of sales and marketing at Sonics; Kalar Rajendiran, senior director of marketing at eSilicon; Mark Throndson, director of product marketing at MIPS; and Mark Baker, senior director of business development at Magma. [youtube vid=0jum2ThIVzg] » read more

3D Stacking: Reality Check
By Ed Sperling - 14 Feb, 2011 - Comments: 0

Semiconductor Manufacturing & Design examines the myth and reality of 3D stacking--and the hurdles that still need to be solved. In the hot seat: VC Jim Hogan; eSilicon's Prasad Subramanian; Sonics' Drew Wingard; Atrenta's Mike Gianfagna, and Mentor Graphics' Michael White. [youtube vid=fWQUGgwC-F4] » read more

Concurrent Design
By Ed Sperling - 11 Feb, 2011 - Comments: 0

The idea of developing software and hardware simultaneously isn't new, but it has taken on renewed urgency in IC design because of growing complexity, including power and proximity issues. Low-Power Engineering captures the perspective of executives at four companies working in this market: Marco Brambilla of STMicroelectronics; Charlie Janac of Arteris; Mike Gianfagna of Atrenta, and Javier De... » read more

Drone Design Challenges
By Ed Sperling - 21 Jan, 2011 - Comments: 0

System-Level Design talks with Bob Bluth of the Naval Postgraduate School about UAV design and debug challenges--and what's inside of these devices. (The blue and green cellophane tape seal some of the access points prior to delivery--and the directions).   [youtube vid=wTsehbWwC8o] » read more

Beyond 22nm
By Ed Sperling - 15 Dec, 2010 - Comments: 0

Gary Patton, VP at IBM's semiconductor R&D Center, talks with System-Level Design about the challenges of developing chips all the way down to 15nm. [youtube vid=2wTj3EvRIRw]   » read more

The Trouble With Semiconductor IP
By Ed Sperling - 01 Dec, 2010 - Comments: 0

Low-Power Engineering takes a poll of the big problem with IP and how to solve it from Ken Brock, senior staff product marketing manager at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta, and Jim McCanny, CEO of Altos Design. [youtube vid=b7wnkY_rU04] » read more

ARM Vs. Intel
By Ed Sperling - 17 Nov, 2010 - Comments: 0

Simon Segars, ARM's executive vice president and general manager of the company's physical IP group, talks about the war with Intel and which markets it's likely to affect. [youtube vid=EISi5qpY77M] » read more

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