Changes In The Ecosystem

By Ed Sperling
For the better part of two decades, semiconductor companies have been talking about ecosystems mostly for marketing and economic reasons. They’re now talking thinking about ecosystems for complex technology reasons that involve integrated models for power, transactions and manufacturability.

In the late 1990s, IBM began assembling its own loose ecosystem as a way of shielding startups from frivolous patent infringement lawsuits. It evolved those relationships into back-end work at its fab in Fishkill, N.Y., as well as at the Nanotechnology Center in Albany, N.Y., as a way of reducing costs and creating a second source for production, which became known as the Common Platform. With new state-of-the-art fabs running several billions of dollars, sharing the cost was a necessity.

That was followed by the Crolles Alliance in Grenoble, France—which brought together STMicroelectronics, Philips Semiconductor (now NXP) and a long list of startups working under their umbrella—to likewise share development costs at advanced process nodes.

More recently, the foundries have created their own ecosystems of companies whose tools they consider acceptable and essential to get chips out the door. And companies such as ARM, MIPS, and Virage Logic (now part of Synopsys) have created their own brand of ecosystems, largely as channels to facilitate the flow of information and technology that make assembling chips and integrating IP and other pieces easier.

While those ecosystems have been in place now for at least several years, and in some cases as long as a decade, the tenor of the relationships of companies within the ecosystems has begun changing. What started out purely as a show of unity against competitors, with shared costs as a foundation, is now being driven much more tightly than ever before by the need to work together on system-wide and sometimes device-wide issues such as power and manufacturability. Getting systems to work makes good economic sense, but in some cases it’s the only way to get a system to work without developing everything from scratch.

“This all revolves around where the markets are and the growing complexity,” said Nandan Nayampally, director of product marketing for ARM’s Processor Division. “In the past people have had to band together to deliver best practices on the process side. What’s changing is on the implementation side, where it has become more necessary.”

For ARM’s ecosystem, at least part of that is a function of cost and volume. The company now serves more markets, including the mobile device market. With advanced SoCs costing $80 million to design, debug and produce, the stakes are much higher. The rule that you’re only as good as your worst partner takes on new meaning at that price tag.

ARM’s introduction of its latest processor, the Cortex A-15, is a case in point. While the company improved the power efficiency of its processor, it also left lots of hooks for its partners to improve that efficiency or performance. “They can put in buffering, clamps and shut off more of the chip than in the past,” Nayampally said. “This is our first processor with coherency in the interface, which means it can all be managed in hardware and you can maintain coherency with the rest of the SoC. The software overhead is down, transactions get faster and you go off the chip less often.”

The price of power
In effect, technology is forcing a functional re-aggregation of the supply chain. The old IDM model is unworkable for most companies, but they collectively need to act more like IDMs than a loose collection of independent companies. A power budget affects all the components on a piece of silicon—even the software—and all the companies contributing to a final product need to be working off the same blueprint.

“What we’re starting to see is transaction-level power models,” said Andrew Yang, chairman and CEO of Apache Design Solutions. “You can save more power at the architectural level than anywhere else.”

That also means understanding all the pieces that go into the SoC and what effects one piece will have on another section of the chip, the PCB, or even the entire device.

“We’re seeing widespread interest these days in ESD (electrostatic discharge),” said Yang. “People are telling us they have ESD failures and when you have an ESD failure the debugging time is at least six months to find the root cause. But when you have 100 power domains it’s harder to protect. If you have one clamp per cell you need 1,000 clamp cells, which is bigger than the whole die. So you do clamp cell optimization and only use 100 of them. That’s why optimization is important.”

It’s also why tightly integrated ecosystems are important. As margins are reduced because of their effect on area, power and performance, pieces need to work together much more precisely—something that is further exacerbated by process variation and on-chip variation.

The future in 3D
Looking out to the future, 3D stacking—which many companies anticipate will begin rolling out in late 2011 or early 2012—requires cooperation across an even bigger swath of the supply chain. In addition to the overall power envelope and signal integrity issues of planar chips, stacking of existing die on new die makes it very difficult to get the heat out and makes it much harder to deal with issues such as ESD and parasitics.

Standards will be needed for everything from place and route to the interfaces between through-silicon vias and the various structures within a 3D chip. Packaging will need to be improved and structures on the chip will need to be even more regular in layout and shape and wiring direction than in the past.

Throw software into the mix and the problem becomes even more complicated—particularly when you consider that all of this has to be understood up front, at the architectural level, and possibly with multiple companies putting their stamp of approval on an initial architectural design.

New chips will demand significant changes in the way ecosystems are managed and conceived, something that will have enormous impact at all levels of the supply chain. Ecosystems are getting more complex as chips get more complex, and the margins available for both of them are shrinking