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Context-Aware SPICE Simulation Improves The Fidelity Of ESD Analysis


Electrostatic discharge (ESD) is a major reliability concern for integrated circuit (IC) designs. ESD verification is proving to be a significant challenge at advanced nodes, due to growing IC design complexity and transistor counts. Traditional ESD verification approaches using parasitic extraction followed by SPICE simulation are deficient in providing simulation results in a practical runtim... » read more

Can We Efficiently Automate 2.5/3D IC ESD Protection Verification?


Protection against ESD events (commonly referred to as ESD robustness) is an extremely important aspect of integrated circuit (IC) design and verification, including 2.5/3D designs. ESD events cause severe damage to ICs due to a sudden and unexpected flow of electrical current between two electrically charged objects. This current may be caused by contact, an electrical short, or dielectric bre... » read more

The Shortest Path Deception


When manufacturing, assembling, and using integrated circuit (IC) chips, the electrostatic discharge (ESD) caused by accumulated static can damage the IC circuitry if the circuit is not properly protected [1]. To prevent such damage, ESD protection devices are designed into the circuitry such that they will create a low impedance path that limits the peak voltage and current by diverting excess... » read more

Meeting Automotive Functional Safety Requirements With GPIOs


Automotive OEMs are building advanced driver assistance systems (ADAS) to improve safety. ADAS systems must meet stringent performance, power, and cost requirements, so the system-on-chips (SoCs) that make up ADAS and passenger safety systems integrate advanced protocols and are built on leading edge finFET process technologies. Designers of this new class of ADAS SoCs are challenged to meet IS... » read more

Many Chiplet Challenges Ahead


Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

ESD P2P And CD Verification Doesn’t Have To Be Hard


As a designer or verification engineer, you’re fighting the effects of electrostatic discharge (ESD) in your integrated circuit (IC) designs all the time. ESD is one of those frustrating issues that can challenge even the most experienced designers. Once an IC is in the market, unexpected electrical shorts will cause immediate failure or dielectric breakdown will result in gradual circuit deg... » read more

Is Common Resistance Affecting Your Analog Design Reliability And Performance?


Integrated circuit (IC) design reliability has always been important and essential to market success. After all, if no one could count on your product to operate as designed, and for as long as intended, there wouldn’t be many buyers! However, given the increase in the types and complexity of design applications, coupled with the increasing technological challenge of manufacturing at advance... » read more

ESD Requirements Are Changing


Standards for specifying a chip’s ability to withstand electrostatic discharge (ESD) are changing – in some cases, getting tougher, and in others, easing up. ESD protection has been on a path from a one-size-fits-all approach to one where a signal’s usage helps to determine what kind of protection it should get. Protecting chips from ESD damage has been a longstanding part of IC design... » read more

Improving Circuit Reliability


Carey Robertson, product marketing director at Mentor, a Siemens Business, examines reliability at advanced and mainstream nodes, particularly in automotive and industrial applications, what’s driving growing concern about the reliability and fidelity of analog circuits, and the impact of running circuits for longer periods of time under different voltage and environmental conditions. » read more

A Reliable I/O Ring For A Reliable SoC


What is an input/output (I/O) ring, and why should I care about it? If you’re a system-on-chip (SoC) designer, you had better know the answer to that question. SoCs are the darlings of the semiconductor industry—they combine all the typical functionality of a computer (central processing unit (CPU), memory, input/output (I/O) ports, and storage) on a single chip. They’re particularly popu... » read more

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