tag: electrostatic discharge

Mastering 3D-IC Verification Complexity
By Matt Grange - 11 Jun, 2026 - Comments: 0

The semiconductor industry's transition from traditional 2D integrated circuits to 2.5D and 3D-IC configurations represents more than an incremental advancement. This architectural shift, driven by the need to push beyond conventional scaling limitations, introduces a cascade of verification challenges that legacy methodologies struggle to address. As designs incorporate multiple stacked dies, ... » read more

Rethinking ESD Protection for System-On-Integrated Chiplets (UC Riverside)
By Technical Paper Link - 28 Apr, 2026 - Comments: 0

A new technical paper, "In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions," was published by researchers at the University of California, Riverside. Abstract "Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functio... » read more

Across The Vast Reaches Of The 3D Stack: Mastering ESD Verification In Advanced Semiconductor Design
By Keerthana Chelur Hithesh - 05 Mar, 2026 - Comments: 0

Introduction: The epic challenge In the vast reaches of the semiconductor cosmos, a silent menace lurks—one that can obliterate years of design work in a fraction of a nanosecond. Electrostatic discharge (ESD) verification stands as the guardian against this invisible threat, a critical discipline that separates the triumphant chip designs from the smoldering wreckage of failed silicon dream... » read more

System-level Reliability Verification for 2.5D/3D ICs Using Innovator3D IC and Calibre 3DPERC
By Siemens EDA - 04 Mar, 2026 - Comments: 0

The increasing demand for higher performance, lower power, and greater functionality in smaller packages has driven the rapid adoption of 2.5D and 3D Integrated Circuits (ICs). However, the inherent complexity of these multi-die architectures presents significant reliability verification challenges that traditional 2D flows cannot adequately address, particularly concerning electrostatic discha... » read more

Real-time Electrostatic Discharge (ESD) Monitoring Detector For Semiconductor Manufacturing
By Technical Paper Link - 05 May, 2025 - Comments: 0

A new technical paper titled "Real-Time ESD Monitoring and Control in Semiconductor Manufacturing Environments With Silicon Chip of ESD Event Detection" was published by researchers at National Yang Ming Chiao Tung University. Abstract "Integrated circuits are susceptible to electrostatic discharge (ESD) events. Real-time detection and alerting of ESD events in semiconductor manufacturing e... » read more

Electronics Reliability In Space: Simulating Rad Hard Designs
By Aliyah Mallak - 10 Apr, 2025 - Comments: 0

Space is a harsh environment. There’s no breathable air, radiation levels are 15 times higher than on Earth, and the approximate temperature is 2.7 Kelvin (minus 270.45 degrees Celsius or minus 454.81 degrees Fahrenheit). Thankfully, Earth’s atmosphere does a great job protecting us from space’s intense climate. But because there is no atmosphere in space, there’s nothing to protect sat... » read more

Pre-Silicon Verification Of Die-to-Die IP With Novel ESD Protection
By Synopsys - 26 Feb, 2025 - Comments: 0

All major foundries have adopted the programmable electrical rule checker (PERC) as the pre-silicon electrostatic discharge (ESD) signoff tool for IP and chip designs. This concept of rule checking works fine for most IP types, but for die-to-die IP, used in 3DIC designs, the PERC approach may not be appropriate. Die-to-die interface IP includes extremely large numbers of I/Os, trending towards... » read more

Efficient ESD Verification For 2.5/3D Automotive ICs
By Dina Medhat - 09 Dec, 2024 - Comments: 0

Protection against electrostatic discharge (ESD) events is an extremely important aspect of integrated circuit (IC) design and verification, particularly for 2.5/3D designs targeted for automotive systems. ESD events cause severe damage to ICs due to a sudden and unexpected flow of electrical current between two electrically charged objects. This current may be caused by contact, an electrical ... » read more

Research Bits: Nov. 25
By Jesse Allen - 25 Nov, 2024 - Comments: 0

3D-printed ESD protection Researchers from Lawrence Livermore National Laboratory developed a printable elastomeric silicone foam for electronics packaging that provides both mechanical and electrostatic discharge (ESD) protection. The team used a 3D printing technique called direct ink writing (DIW), an extrusion process in which a paste with controlled rheological properties such as elast... » read more

Design Optimal ESD Protection With Context-Aware SPICE Simulation
By Neel Natekar - 29 Aug, 2024 - Comments: 0

Electrostatic discharge (ESD) is a major reliability concern for modern ICs. Ensuring the robustness of ICs in an ESD event by providing adequate ESD protection is proving to be a major challenge for IC designers due to factors such as shrinking of the design features, reduction in gate oxide thickness, increase in the contact and interconnect resistance and an increase in the overall design co... » read more

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