Changing Opinions About Noise

Researchers gain a better understanding of thorny noise issues; theory and model get refined.

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By Brian Fuller

On a sunny, warm May day in 2009, NIST researcher Jason Campbell took the stage at an IEEE event in Austin with a presentation that was sure cast a pall over the booming low-power semiconductor world.

Campbell’s paper, written with Liangchun Yu, Kin Cheung, Jin Qin, John S. Suehle, A. Oates, Kuang Sheng, was entitled “Large Random Telegraph Noise in Sub-Threshold Operation of Nano-scale nMOSFETs.” It was your typical deeply technical, vaguely ominous IEEE paper to be sure.

The research and its implications, however, were anything but vague and mysterious.

Campbell and his team had discovered, while exploring transistor behavior, that the widely accepted model explaining errors caused by electronic noise in the switches does not fit the facts. Defects in transistor materials can cause malfunctions, which in turn, makes it appear as if the device is fluctuating erratically between “on” and “off” states.

This elastic tunneling model predicts that the smaller transistors shrink, the higher the frequency of those fluctuations. This has, for decades, guided electronics design.

Campbell and the team showed that even in nanometer-sized transistors, the fluctuation frequency remains the same.

“This implies that the theory explaining the effect must be wrong,” Campbell said, in a story published by NIST a year ago. “The model was a good working theory when transistors were large, but our observations clearly indicate that it’s incorrect at the smaller nanoscale regimes where industry is headed.”

As power decreases, the fluctuations actually become larger, they found.

“This is a real bottleneck in our development of transistors for low-power applications,” he said. “We have to understand the problem before we can fix it—and troublingly, we don’t know what’s actually happening.”

The paper was picked up widely throughout the industry, yet, given the potential implications for scaling, the industry didn’t freeze in its tracks. This may be due in part to Gennadi Bersuker and his colleagues from Sematech.

“In general, it was very good that they (NIST researchers) raised the issue,” Bersuker said in an interview. “There were some definitely holes in the understanding in this noise phenomenon. That (research) stimulated us to look at it carefully.”

Look carefully they did. In two presentations, one in the fall of 2009 and one this past May, Bersuker, project manager of electrical characterization and reliability, Dimitri Veksler and other Sematech researchers dived deeper into the issues.

“We refined the theory, the model,” Bersuker said. “I believe we described successfully the data and reproduced the NIST data. The reason they were concerned, which were legitimate concerns, is people tend to use simplified description of phenomena, and it works reasonably well until you reach certain limits and you have to pay attention to a simple description which might not be sufficient.”

To understand the situation better, Bersuker and his colleagues used the concept of ‘lattice relaxation’ around a defect; when the defect traps a charge (electron), the neighboring nuclei “feel” its Coulomb potential and shift their position slightly to accommodate this additional force – that is, they ‘relax’ around the defect. This relaxation requires a finite amount of energy, amounting to a barrier which slows down the rate of capture.

In the paper the team delivered in May to an international reliability conference, the Sematech team reported: “The … self-consistent analysis of the charge exchange process between the semiconductor and defects (electron traps) in the dielectric opens up the possibility of identifying the defect responsible for low frequency noise characteristics. The theoretical approach employed, which takes into consideration a multiphonon trap relaxation process, reproduces experimental data in a given device with a single set of defect characteristics across the entire range of temperatures and gate biases. The analysis demonstrates consistent results over a variety of gate stacks (high-k/metal, SiON/poly, SiO2/SiN) used in the experiments.”

Being able to accurately simulate the processes responsible for noise is of course vital for process development.

“We now have an additional tool to mitigate defects,” he said.