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Combination of AI Techniques To Find The Best Ways to Place Transistors on Silicon Chips

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A new technical paper titled “AutoDMP: Automated DREAMPlace-based Macro Placement” was published by researchers at NVIDIA.

Abstract:
“Macro placement is a critical very large-scale integration (VLSI) physical design problem that significantly impacts the design power-performance-area (PPA) metrics. This paper proposes AutoDMP, a methodology that leverages DREAMPlace, a GPU-accelerated placer, to place macros and standard cells concurrently in conjunction with automated parameter tuning using a multi-objective hyperparameter optimization technique. As a result, we can generate high-quality predictable solutions, improving the macro placement quality of academic benchmarks compared to baseline results generated from academic and commercial tools. AutoDMP is also computationally efficient, optimizing a design with 2.7 million cells and 320 macros in 3 hours on a single NVIDIA DGX Station A100. This work demonstrates the promise and potential of combining GPU-accelerated algorithms and ML techniques for VLSI design automation.”

Find the technical paper here. Github material is here and NVIDIA’s summary is here.

Agnesina, Anthony, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, and Haoxing Ren. “AutoDMP: Automated DREAMPlace-based Macro Placement.” In Proceedings of the 2023 International Symposium on Physical Design, pp. 149-157. 2023.



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