System-HW Co-Design Approach Combines Mono3D DRAM, NMP, and GPU Acceleration (UCSD, Georgia Tech, UIUC, Illinois Tech)


A new technical paper titled "Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving" was published by researchers at UC San Diego, Georgia Tech, University of Illinois Urbana-Champaign and Illinois Institute of Technology. Abstract "As Large Language Models (LLMs) continue to evolve, Mixture of Experts (MoE) architecture has emerged as a preva... » read more

Best Practices and HPC Strategies for Ansys Mechanical


Mechanical engineers face growing complexity in structural simulations. Modeling intricate geometries, capturing nonlinear material behaviors, and ensuring accurate boundary conditions often push traditional computing resources to their limits. These challenges can lead to longer solve times, convergence issues, and difficulties interpreting results — all of which slow innovation and impact p... » read more

New Ways To Improve EDA Productivity


EDA vendors are taking aim at new ways to improve the productivity of design and verification engineers, who are struggling to keep pace with exponential increases in chip complexity in tight time-to-market windows and with constrained engineering talent pipelines. In the past, progress often was as straightforward as improving algorithms or parallelizing computations in a linear flow. But w... » read more

Aeroacoustics Large-Eddy Simulation of VTOL Aircraft Design


This conference paper, co-authored by Honda Motor Co. and Cadence, reveals  findings on the aeroacoustics predictions of multibladed vertical take-off and landing (VTOL) rotors using large-eddy simulations (LES). Why should you read this white paper? Advanced Simulations: We conducted simulations on VTOL rotors with two to five blades, assessing high-frequency noise predictions. Exp... » read more

GPU Acceleration for Pixel-based Computing in Various Mask Processing and Verification Steps


A technical paper titled "Leaping into the curvy world with GPU accelerated O(p) computing" was published by researchers at D2S, Inc. The papers discusses the advantages of using GPU acceleration for pixel-based computing during various mask processing and verification steps.  It found that the O(p) approach for GPU acceleration is effective in handling data processing for curvy masks. F... » read more

Opportunities Grow For GPU Acceleration


Experts at the Table: Semiconductor Engineering sat down to discuss the impact of GPU acceleration on mask design and production and other process technologies, with Aki Fujimura, CEO of D2S; Youping Zhang, head of ASML Brion; Yalin Xiong, senior vice president and general manager of the BBP and reticle products division at KLA; and Kostas Adam, vice president of engineering at Synopsys. W... » read more

A Safety Island For Safe Use of HPC Devices For Safety-Critical Systems with RISC-V


A technical paper titled “Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains” was published by researchers at Barcelona Supercomputing Center and Intel. Abstract: "HPC (High Performance Computing) devices increasingly become the only alternative to deliver the performance needed in safety-critical autonomous systems (e.g., autonomous cars, unmanned planes) du... » read more

Combination of AI Techniques To Find The Best Ways to Place Transistors on Silicon Chips


A new technical paper titled "AutoDMP: Automated DREAMPlace-based Macro Placement" was published by researchers at NVIDIA. Abstract: "Macro placement is a critical very large-scale integration (VLSI) physical design problem that significantly impacts the design power-performance-area (PPA) metrics. This paper proposes AutoDMP, a methodology that leverages DREAMPlace, a GPU-accelerated place... » read more

Getting Ready For EUV


The highly anticipated introduction of extreme ultra-violet (EUV) lithography is reflected in recent surveys conducted by the eBeam Initiative, which will be presented on Sept. 11 at the annual Photomask Technology Symposium in Monterey, Calif.  There are many changes are coming to the mask industry, in addition to EUV. Those include greater use of inverse-lithography technologies (ILT) and... » read more

The Secret Life Of Accelerators


Accelerator chips increasingly are providing the performance boost that device scaling once provided, changing basic assumptions about how data moves within an electronic system and where it should be processed. To the outside world, little appears to have changed. But beneath the glossy exterior, and almost always hidden from view, accelerator chips are becoming an integral part of most des... » read more

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