Efficient Noise Analysis For Complex Non-Periodic Analog/RF Blocks

An overview of noise in semiconductors, analysis methods, with results from production circuits.

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Noise minimization is a required design objective for advanced analog and RF circuits. Unlike digital circuits, where noise is a second-order effect, noise in analog and RF circuits directly affects system performance metrics such as signal to noise ratio (SNR) and bit error rate (BER). Effective design optimization in the presence of random device noise is challenging because the noise sources are inherent in the circuit elements and cannot be eliminated. Because device noise determines the fundamental limits on circuit performance, it plays a significant role in analog/RF circuit design. [1] Noise-related issues become particularly critical in circuits that have noise-sensitive architectures, have tight specifications, and are implemented in bulk CMOS processes with low voltage levels and high frequencies. Most common complex blocks, including ADCs, PLLs, transmit chains, receive chains, high-speed I/Os, and DC:DC converters, are highly susceptible to noise. Traditional SPICE and RF tools cannot handle device noise analysis of today’s complex circuits due to convergence, accuracy, and performance limitations. Very few design teams perform transistor-level device noise analysis at the complex-block level, and many designers must simplify even more complex subcircuits (such as VCOs with buffer, bias, and divider) to perform noise analysis. Digital fastSPICE tools do not offer device noise analysis capabilities, and given their high levels of inaccuracy, using digital fastSPICE tools for transient noise analysis would be meaningless. Berkeley Design Automation (now Mentor Graphics) provides comprehensive, world-class device noise analysis with characteristics that parallel those for its transient simulation: true SPICE accuracy, 5x-20x higher performance and >10M-element capacity. These capabilities make it practical, for the first time, to thoroughly characterize noise in sensitive complex blocks including sigma-delta ADCs, fractional-N PLLs, SerDes/CDRs, and DC:DC converters. This white paper provides an overview of noise in semiconductors and device noise analysis methods. It continues with a detailed description of transient noise analysis, its application to non-periodic complex blocks, and its implementation in the Berkeley Design Automation Analog FastSPICE Platform (AFS Platform). This paper concludes with AFS Transient Noise analysis results for a number of challenging production circuits.

To view this white paper, click here.