eFPGA IP Density, Portability And Scalability

A look at the different business models and what happens when companies embed FPGA IP.


FPGA chip companies generally build a new generation of FPGAs every ~3 years when there is a major advance in process technology.

They pick one foundry, one node, one variation of that node and do full-custom circuit design with typically the maximum or near-maximum number of metal layers in order to get the highest density FPGA they can. It takes them most of the 3 years to do the complex engineering required.

Since FPGA customers want a range of sizes and some variation in the ratio of options like DSP/RAM, the FPGA chip companies will construct their FPGAs from some modular pieces: a block of LUTs, a DSP block, and typically a block-RAM (dual port). The 3-10 different sizes of the FPGA are put together from the blocks with circuit designers tuning the mesh interconnects and I/O’s for the array size.

Their business model is to optimize to make the best FPGAs. What happens when they provide embedded FPGA IP?

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