Embedded FPGA, The Ultimate Accelerator

An embedded FPGA (eFPGA) is an IP core that you integrate into your ASIC or SoC to get the benefits of programmable logic without the cost, but with better latency, throughput, and power characteristics. With an eFPGA, you define the quantity of look-up-tables (LUTs), registers, embedded memory, and DSP blocks. You can also control the aspect ratio, number of I/O ports, making tradeoffs between power and performance.

FPGAs are optimal hardware accelerators because they provide the extreme acceleration available only from dedicated hardware, but can be reprogrammed, allowing the acceleration logic to be updated with new algorithms and interface standards. Standalone FPGAs are a convenient and practical solution for some applications, but embedded FPGA IP takes the concept to the next level, supporting extremely low latency and high throughput communications with significant cost savings for high-volume applications.

Examples of the benefits of eFPGAs include:

• Higher performance. The eFPGA is connected to your ASIC through a wide parallel interface, offering dramatically higher throughput, with latency counted in single-digit clock cycles.
• Lower power. Programmable I/O circuitry accounts for half of the total power consumption of standalone FPGAs. An eFPGA has direct wire connections to the SoC, eliminating the large programmable I/O buffers altogether. In addition, an eFPGA can be sized exactly to your requirements, and you can tune the process technology to trade off performance vs. power.
• Lower system cost. An eFPGA die size is much smaller than standalone FPGAs — the programmable I/O buffers, unused DSP and memory blocks, and over-provisioned LUTs and registers are all eliminated. In comparison, traditional FPGAs have high pin counts with the pins closely spaced, forcing you to manufacture a PCB with many layers. Embedded FPGAs eliminate the need for specialized PCBs, as well as all of the support components such as power regulators, clock generators, level shifters, and passive components.
• Higher system reliability and yields. Integrating FPGA functionality into an ASIC improves system-level signal integrity and eliminates reliability and yield loss associated with having a standalone FPGA on the PCB.

In future posts, we’ll be discussing some of the technical hurdles we’ve overcome to make this technology available, such as novel approaches to eFPGA/ASIC boundary timing closure and deeply embedded FPGA test pattern generation. We’ll also talk about some of the opportunities for this disruptive technology, such as ultra-fine-grain algorithm acceleration and real-time embedded vision acceleration.

Achronix delivers a GDS II representation of its Speedcore IP that  can be integrated directly into your SoC or ASIC. We also provide you with a custom, full-featured version of our ACE design tools, that you can use to design, verify and program the functionality of the Speedcore eFPGA. Achronix has been around for over a decade, and has years of experience developing specialized high-performance FPGAs. The Speedcore eFPGA is designed for compute and network acceleration applications and is based on the same high-performance architecture that is in Achronix’s Speedster 22i FPGAs, which have been in volume production for years. Speedcore eFPGAs are architected in a modular fashion to allow you to define the resource requirements, allowing Achronix to rapidly configure the Speedcore IP for delivery. This modular architecture allows Achronix to easily port the FPGA core to different process technologies and metal stacks. Speedcore IP is now available on TSMC 16FF+ and is in development on TSMC 7nm.

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