Week in Review: IoT, Security, Auto


Internet of Things Gartner identified what it says are the top 10 strategic Internet of Things technologies and trends. Number one, no surprise, is artificial intelligence. Nick Jones, research vice president at Gartner, said in a statement, “AI will be applied to a wide range of IoT information, including video, still images, speech, network traffic activity, and sensor data.” Other top t... » read more

Week In Review: Design, Low Power


Tools & Standards Mentor uncorked a PCB design platform for non-specialist PCB engineers focused on multi-dimensional verification. The Xpedition platform can integrate a range of verification tools within a singular authoring environment, providing automatic model creation, concurrent simulation, cross probing from results, and error reviews to identify problems at the schematic or layout... » read more

Week In Review: Manufacturing, Test


Chipmakers A U.S. federal grand jury has indicted Chinese DRAM maker Jinhua Integrated Circuit Co. (JHICC), Taiwan's UMC and three individuals, charging them with alleged crimes related to a conspiracy to steal, convey, and possess stolen trade secrets from Micron Technology for the benefit of a company controlled by the China government. In addition, the U.S. filed a civil lawsuit seeking... » read more

AI Begins To Reshape Chip Design


Artificial intelligence is beginning to impact semiconductor design as architects begin leveraging its capabilities to improve performance and reduce power, setting the stage for a number of foundational shifts in how chips are developed, manufactured and updated in the future. AI—and machine learning and deep learning subsets—can be used to greatly improve the functional control and pow... » read more

A Crisis In DoD’s Trusted Foundry Program?


The U.S. Department of Defense’s Trusted Foundry program is in flux due to GlobalFoundries’ recent decision to put 7nm on hold, raising national security concerns across the U.S. defense community. U.S. DoD and military/aerospace chip customers currently have access to U.S.-based “secure” foundry capacity down to 14nm, but that's where it ends. No other foundries provide similar “s... » read more

eFPGA vs. FPGA Design Methodologies


Namit Varma, senior director of Achronix’s India Technology Center, discusses the differences between discrete and embedded FPGAs. https://youtu.be/Vwo3ktQvcKc » read more

Making Buildings Smarter


Calling a building “smart” implies that technology is embedded to make that building more efficient, useful, convenient and profitable. The goal is to program efficiency beyond what humans can provide. But “smart” also may imply a healthy dose of marketing hype. No one wants to live in a “dumb building,” but it's difficult to define what makes a building smart. And while much is ... » read more

Achieving eFPGA Timing Closure In An ASIC


When we start school as young children, one of the first lessons we learn is how to share, followed quickly by not running with scissors. As Kent Orthner, Achronix’s senior director of Systems Engineering, discussed at the Design Automation Conference in June, sharing is also key when it comes to closing timing with embedded FPGAs (eFPGAs). With an eFPGA, such as Achronix’s Speedcore IP,... » read more

Machine Learning Shifts More Work to FPGAs, SoCs


A wave of machine-learning-optimized chips is expected to begin shipping in the next few months, but it will take time before data centers decide whether these new accelerators are worth adopting and whether they actually live up to claims of big gains in performance. There are numerous reports that silicon custom-designed for machine learning will deliver 100X the performance of current opt... » read more

Deriving Configuration Time For eFPGAs


Part 1 of this blog post described how to configure an eFPGA, using Achronix’s Speedcore eFPGA as an example. It explained why each instance of the eFPGA in an ASIC or SoC design must be configured after the system powers up due to its nonvolatile SRAM technology to store configuration bits. This post will detail how the configuration time is derived, once again using Speedcore eFPGA as th... » read more

← Older posts