Tech Talk: eFPGA Performance Benchmarking


Tony Kozaczuk, director of system architecture at Flex Logix, explains how to avoid bottlenecks and improve throughput and performance in embedded FPGAs. https://youtu.be/dPDylKG7jhA » read more

Timing Signoff Methodology For eFPGA


An eFPGA is a hard IP block in an SoC. Most SoCs are made up of a collection of hard IP blocks (RAM, SerDes, PHYs…) and the remaining logic is constructed using Standard Cells. The timing signoff for an eFPGA’s interface with the rest of the chip is designed to leverage standard ASIC timing signoff flow for a hard-macro: as long as inputs/output to/from the eFPGA are all flopped, the int... » read more

Tech Talk: eFPGA Timing


Flex Logix's Chen Wang talks about timing for an embedded FPGA and how that differs from ASIC timing. https://youtu.be/n88D1N4IEbs » read more

Designing 5G Chips


5G is the wireless technology of the future, and it’s coming fast. The technology boasts very high-speed data transfer rates, much lower latency than 4G LTE, and the ability to handle significantly higher densities of devices per cell site. In short, it is the best technology for the massive amount of data that will be generated by sensors in cars, IoT devices, and a growing list of next-g... » read more

Tech Talk: On-Chip Variation


Raymond Nijssen, vice president of systems engineering at Achronix, discusses on-chip and process variation at 7nm and 5nm, the role of embedded FPGAs, and how to reduce margin and pessimistic designs. https://youtu.be/LQnw_3H9soQ » read more

Tech Talk: eFPGA Density


Chen Wang, senior vice president of engineering at Flex Logix, talks about how to improve density in embedded FPGAs. https://youtu.be/Rk0oqzWQr8I » read more

The Race To Accelerate


Geoff Tate, CEO of [getentity id="22921" e_name="Flex Logix"], sat down with Semiconductor Engineering to discuss how the chip industry is changing, why that bodes well for embedded FPGAs, and what you need to be aware of when using programmable logic on the same die as other devices. What follows are excerpts of that conversation. SE: What are the biggest challenges facing the chip industry... » read more

Tech Talk: eFPGA Programming


Kent Orthner, system architect at Achronix, explains how to program an embedded FPGA and what's different for ASIC engineers. https://youtu.be/uVyflHZi-x8 » read more

eFPGA Acceleration in SoCs


The Speedcore design and integration methodology has been defined with intimate awareness of the difficulties ASIC engineering teams must contend with. All the necessary files and flows for capturing the functional, timing and power characteristics of a user-defined and programmed Speedcore instance, along with support for successfully reconfiguring an already field-deployed Speedcore IP embedd... » read more

Embedded FPGA, The Ultimate Accelerator


An embedded FPGA (eFPGA) is an IP core that you integrate into your ASIC or SoC to get the benefits of programmable logic without the cost, but with better latency, throughput, and power characteristics. With an eFPGA, you define the quantity of look-up-tables (LUTs), registers, embedded memory, and DSP blocks. You can also control the aspect ratio, number of I/O ports, making tradeoffs between... » read more

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