The Next Generation Of Embedded FPGA

EFLX eFPGA has been in use in SoCs for more than 5 years, hardware and software. More than 40 chips have been licensed to use EFLX eFPGA and more than 20 chips are working in silicon. Big customers like Renesas are planning high volumes and families of chips using eFPGA.

As we have worked with customers our architecture has evolved from EFLX Gen 1.0 to Gen 2.0, 2.1, 2.2, 2.3 and now in 2023 we are doing all new designs using Gen 2.4 ELFX eFPGA.

This blog will review all of the enhancements in the new Gen2.4: more clocks, more flexible BRAM, error correction, better coverage, faster test with fewer pins, and memory repair support.

More clock resources

EFLX eFPGA is delivered in arrays of any size using EFLX tiles of 4K LUTs each.

Based on customer demands, we have increased the number of clocks available in each tile to 4 clocks AND the inversions of each of the 4 clocks.

The array can have up to 64 clocks in total.

Reconfigurable BRAM (Block RAM) with ECC

Most customers want Block RAM integrated in their Array – like is the case in FPGAs.

Our new RBRAM (Reconfigurable Block RAM) is True Dual Port and enables customers to configure a single macro to optimize for their use case:

• Wider or narrower bus – Varying write-enable width
• ECC, parity or no checking

Higher DFT coverage

DC or stuck-at coverage is now >98% and we are working to pushing it higher all the time. AC or dynamic coverage is now >95% and we are working to improve.

Lower test cost

For 16nm, Scan and DFT configuration will run at 200MHz worst-case for much shorter test times. Performance for smaller geometries will, of course, be higher.

Test cost is a function of test time and the cost of interface pins for testing – the customer has multiple options to tradeoff between lower pin count and higher test speed.

Test compression options are available as well to improve test cost.

Memory repair

Gen 2.4 gives the customer direct access to the MBIST/Repair interface:

Summary

EFLX Gen2.4 gives the customer more features, more flexibility, higher yield and lower test costs, which all make the value of eFPGA even better than before.

EFLX Gen2.4 is the architecture being used for all process ports in process now and in the future at Flex Logix.