Forward Body Biasing in Bulk Cryo-CMOS With Negligible Leakage (TU Delft)


A new technical paper titled “Cryogenic-Aware Forward Body Biasing in Bulk CMOS” was published by researchers at QuTech, Tu Delft.


“Cryogenic CMOS (cryo-CMOS) circuits are often hindered by the cryogenic threshold-voltage increase. To mitigate such an increase, a forward body biasing (FBB) technique in bulk CMOS is proposed, which can operate up to the nominal supply without problematic leakage currents, thanks to the larger diode turn-on voltage at cryogenic temperatures. As a result, traditional circuits, such as pass-gates, can operate down to 4.2 K, and their performance is augmented, e.g., digital circuits speeding up by 1.62× or lowering their energy per transition and energy-delay product by 4.24× and 2.33×, respectively. Unlike back biasing in FD-SOI, here all FBB voltages remain within the supplies, hence enabling on-chip and device-specific biasing. The proposed FBB technique thus represents a valuable design tool for bulk cryo-CMOS circuits.”

Find the technical paper here. Published November 2023.

R. W. J. Overwater, M. Babaie and F. Sebastiano, “Cryogenic-Aware Forward Body Biasing in Bulk CMOS,” in IEEE Electron Device Letters, doi: 10.1109/LED.2023.3337441.


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