Hardware Security: New Mathematical Model To Quantify Information Flow in Digital Circuits For Different Attack Models (RWTH Aachen)


A new technical paper titled “Quantitative Information Flow for Hardware: Advancing the Attack Landscape” was published by researchers at RWTH Aachen University.

“Security still remains an afterthought in modern Electronic Design Automation (EDA) tools, which solely focus on enhancing performance and reducing the chip size. Typically, the security analysis is conducted by hand, leading to vulnerabilities in the design remaining unnoticed. Security-aware EDA tools assist the designer in the identification and removal of security threats while keeping performance and area in mind. State-of-the-art approaches utilize information flow analysis to spot unintended information leakages in design structures. However, the classification of such threats is binary, resulting in negligible leakages being listed as well. A novel quantitative analysis allows the application of a metric to determine a numeric value for a leakage. Nonetheless, current approximations to quantify the leakage are still prone to overlooking leakages. The mathematical model 2D-QModel introduced in this work aims to overcome this shortcoming. Additionally, as previous work only includes a limited threat model, multiple threat models can be applied using the provided approach. Open-source benchmarks are used to show the capabilities of 2D-QModel to identify hardware Trojans in the design while ignoring insignificant leakages.”

Find the technical paper here. Published Nov. 2022.

Reimann, Lennart M. ; Erdönmez, Sarp ; Sisejkovic, Dominik ; Leupers, Rainer.

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