tag: hardware security

Breaking The “Unhackable” Xbox One
By Jasper van Woudenberg - 04 Jun, 2026 - Comments: 0

For more than a decade, the Xbox One stood out as one of the most resilient consumer devices ever built. While other consoles from the same era were eventually jailbroken or modified, the Xbox One remained largely untouched. Its layered defenses, hardened boot process, and strong cryptographic foundations earned it a reputation as effectively “unhackable.” That assumption changed at RE//... » read more

Detecting Defect-Induced Silent Data Corruptions in CPUs (Stanford, Google)
By Technical Paper Link - 25 May, 2026 - Comments: 0

Researchers from Stanford University and Google have published “ITHICA: Intra-Thread Instruction Checking Approach for Defect-Induced Silent Data Corruptions”. Abstract “Hyperscaler reports of silent data corruptions (SDCs)—presumed to be caused by silicon manufacturing defects—have motivated the development of functional tests for detecting defective CPUs and their use in h... » read more

Side-Channel Risks Across 2.5D/3D Integration and Chiplet-Based Systems (Grenoble INP – UGA et al.)
By Technical Paper Link - 25 May, 2026 - Comments: 0

Researchers from Grenoble INP - UGA, CNRS, TIMA have released “Spying Across Chiplets: Side-Channel Attacks in 2.5/3D Integrated Systems”. Abstract “Advanced packaging and chiplet-based integration are increasingly adopted to build complex heterogeneous systems beyond the limits of monolithic scaling. While these architectures offer major benefits in terms of modularity, yield, a... » read more

Emulation-based SoC Security Verification (U. of Florida)
By Technical Paper Link - 17 Apr, 2026 - Comments: 0

A new technical paper, "Emulation-based System-on-Chip Security Verification: Challenges and Opportunities," was published by researchers at University of Florida. Abstract "Increasing system-on-chip (SoC) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation to the forefront of semiconductor desig... » read more

GPU Rowhammer Attacks Beyond Data Corruption (U. of Toronto)
By Technical Paper Link - 13 Apr, 2026 - Comments: 0

A new technical paper, "GPUBreach: Privilege Escalation Attacks via GPU Rowhammer," was published by researchers at University of Toronto. Summary "GPUBreach shows that GPU Rowhammer attacks can move beyond data corruption to real privilege escalation. By corrupting GPU page tables, an unprivileged CUDA kernel can gain arbitrary GPU memory read/write, and then chain that capability into CPU... » read more

Silent Data Corruption: A Major Reliability Challenge in Large-Scale LLM Training (TU Berlin)
By Technical Paper Link - 12 Apr, 2026 - Comments: 0

A new technical paper, "Exploring Silent Data Corruption as a Reliability Challenge in LLM Training," was published by researchers at Technische Universitat Berlin. Abstract "As Large Language Models (LLMs) scale in size and complexity, the consequences of failures during training become increasingly severe. A major challenge arises from Silent Data Corruption (SDC): hardware-induced faults... » read more

Automated Security Assertion Generation Using LLMs (U. of Florida)
By Technical Paper Link - 03 Apr, 2026 - Comments: 0

A new technical paper, "Assertain: Automated Security Assertion Generation Using Large Language Models," was published by University of Florida. Abstract "The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated ... » read more

The One Bit Problem That Can Break a System
By Ann Mutschler - 02 Apr, 2026 - Comments: 2

Key Takeaways: Bit flipping is no longer a rare reliability issue but a systemic risk driven by shrinking process nodes, higher clock speeds, lower voltages, and radiation exposure, leading to silent data corruption and potential system failure. The same mechanisms that cause accidental bit flips can be deliberately exploited through techniques such as clock, voltage, laser, and rowhamm... » read more

Secure at First Silicon: Reducing Cost and Risk
By Keysight - 01 Apr, 2026 - Comments: 0

Security weaknesses related to side-channel leakage are often discovered far too late in the lifecycle of a chip. Design teams may focus on functionality, performance, and power, assuming that a robust algorithm like AES is enough to guarantee security. Only after first silicon comes back – and an expert lab starts probing power traces or EM emissions – do they realize that sensitive inform... » read more

Hardware Deployment for Secure AI Using Confidential Computing
By Rambus - 01 Apr, 2026 - Comments: 0

AI’s fast evolution is producing autonomous systems that can operate with minimal human oversight, improve themselves and become effective at decision-making in complex environments. These developments require careful consideration of security and privacy. To limit the overhead performance impact (area, throughput, latency and power), hardware-based security solutions can be deploye... » read more

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