HW Fingerprinting Technique for Silicon Photonic ICs Using Photonic Crystal-based Density-Controlled Patterns (U. of Florida)


Researchers from University of Florida published a technical paper titled “Enhancing Co-packaging Optics Enabled Silicon Photonics Security Assurance Hardware Fingerprinting.” Abstract Excerpt: The paper proposes a method that “embeds two-dimensional photonic crystal (PhC) patterns” and creates a “distinctive optical signature” for device authentication. Find the technical pap... » read more

Fault Injection Framework Targets RISC-V Security Weak Spots


Researchers from Politecnico di Torino and CEA-List published a technical paper titled “InjectV: Modeling Fault Injection Attacks in RISC-V Simulation Environment.” Abstract "Fault Injection Attacks (FIAs) are a significant threat to hardware security, capable of compromising systems by inducing malicious faults in computation or storage. Evaluating resilience against such attacks is chal... » read more

Building Edge AI with IP Solutions


As AI inference moves from centralized cloud infrastructure into vehicles, factories, medical devices, and industrial systems, the decisive design challenge shifts from model quality to field-ready implementation. Deployed edge AI systems must perform reliably under a range of constraints, including fixed power budgets, stringent latency requirements, limited or intermittent cloud connectivity,... » read more

Breaking The “Unhackable” Xbox One


For more than a decade, the Xbox One stood out as one of the most resilient consumer devices ever built. While other consoles from the same era were eventually jailbroken or modified, the Xbox One remained largely untouched. Its layered defenses, hardened boot process, and strong cryptographic foundations earned it a reputation as effectively “unhackable.” That assumption changed at RE//... » read more

Detecting Defect-Induced Silent Data Corruptions in CPUs (Stanford, Google)


Researchers from Stanford University and Google have published “ITHICA: Intra-Thread Instruction Checking Approach for Defect-Induced Silent Data Corruptions”. Abstract “Hyperscaler reports of silent data corruptions (SDCs)—presumed to be caused by silicon manufacturing defects—have motivated the development of functional tests for detecting defective CPUs and their use in h... » read more

Side-Channel Risks Across 2.5D/3D Integration and Chiplet-Based Systems (Grenoble INP – UGA et al.)


Researchers from Grenoble INP - UGA, CNRS, TIMA have released “Spying Across Chiplets: Side-Channel Attacks in 2.5/3D Integrated Systems”. Abstract “Advanced packaging and chiplet-based integration are increasingly adopted to build complex heterogeneous systems beyond the limits of monolithic scaling. While these architectures offer major benefits in terms of modularity, yield, a... » read more

Emulation-based SoC Security Verification (U. of Florida)


A new technical paper, "Emulation-based System-on-Chip Security Verification: Challenges and Opportunities," was published by researchers at University of Florida. Abstract "Increasing system-on-chip (SoC) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation to the forefront of semiconductor desig... » read more

GPU Rowhammer Attacks Beyond Data Corruption (U. of Toronto)


A new technical paper, "GPUBreach: Privilege Escalation Attacks via GPU Rowhammer," was published by researchers at University of Toronto. Summary "GPUBreach shows that GPU Rowhammer attacks can move beyond data corruption to real privilege escalation. By corrupting GPU page tables, an unprivileged CUDA kernel can gain arbitrary GPU memory read/write, and then chain that capability into CPU... » read more

Silent Data Corruption: A Major Reliability Challenge in Large-Scale LLM Training (TU Berlin)


A new technical paper, "Exploring Silent Data Corruption as a Reliability Challenge in LLM Training," was published by researchers at Technische Universitat Berlin. Abstract "As Large Language Models (LLMs) scale in size and complexity, the consequences of failures during training become increasingly severe. A major challenge arises from Silent Data Corruption (SDC): hardware-induced faults... » read more

Automated Security Assertion Generation Using LLMs (U. of Florida)


A new technical paper, "Assertain: Automated Security Assertion Generation Using Large Language Models," was published by University of Florida. Abstract "The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated ... » read more

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