High-Speed High-Capacity Mixed-Signal Simulation Of Silicon Photonics

Many of today’s computing and communications applications demand almost unimaginable processing capability and high-bandwidth access to memory. For example, many data center systems using high-end Graphics Processing Units (GPUs) often need to transfer multiple terabytes per second.

Traditional copper-based interconnects, limited to speeds of hundreds of megabits per second (Mbps), cannot satisfy these systems’ data bandwidth requirements. The solution is to use optical interconnects, which use light to transmit data at speeds as high as 100 gigabits per second (Gbps).

This technology leverages photonics, the branch of optics that generates, detects, and manipulates light. Silicon photonics, a key advancement in this field, integrates optical and electronic components on a single silicon chip, enabling high-bandwidth data transfer. Applications that employ silicon photonics include data center interconnects, 5G+ wireless networks, metro/long-haul telecommunications, high-performance computing (HPC), artificial intelligence (AI), and quantum computing (QC).

The convergence of silicon and photonics is driving innovation across industries by addressing the need for efficient, high-speed interconnects in advanced systems. As adoption of this technology accelerates, the challenge lies in accurately simulating and verifying these complex mixed-signal systems. Recent advancements in photonic modeling provide engineers with tools to seamlessly integrate electrical and photonic components, paving the way for the next generation of high-performance systems.

Architectural alternatives

Some optical interconnect-based systems involve dedicated, individually packaged silicon photonic devices mounted on PCIe expansion cards. Alternatively, dedicated silicon photonic devices may be mounted directly onto the motherboard. Some data centers feature racks of servers connected by optical backplanes.

An increasingly common scenario is to employ multi-die systems, which feature a single package containing a main die in the form of a system-on-chip (SoC) device accompanied by silicon photonic transceiver chiplets that combine optical and electronic components. This is the most challenging scenario, and it is the primary focus of this paper.

In this case, the SoC will typically be predominantly digital, likely containing tens of billions of transistors. By comparison, the silicon photonic chiplets will feature a mixed-signal design consisting of analog and digital functionality. In addition to performing its primary processing tasks, the SoC will also exercise control over the operation and fine-tuning of the silicon photonic chiplets. The challenge is to verify the system functionality of the primary die and the chiplets.

Common silicon photonic elements

It is possible to create a variety of on-chip silicon photonic elements. First, a light source and a light detector are necessary, as indicated in figure 1.

Fig. 1: Light source and light detector.

Light sources, which include light-emitting diodes (LEDs) and lasers, convert electrical signals into optical signals, transforming electrons into photons. These devices generally output signals with fixed wavelengths, or frequencies, in the optical and infrared (IR) portions of the electromagnetic spectrum. By comparison, light detectors, which include photodiodes and photomultipliers, convert optical signals into electrical signals, converting photons to electrons.

Next, it is necessary to have the ability to fabricate optical waveguides in the silicon die. These are physical structures that convey optical waves in the same way copper wires conduct electrical signals. In addition to simple waveguides, as illustrated in figure 2a, it is possible to create electrically controllable waveguides, as shown in figure 2b.

Fig. 2: Two optical waveguide examples.

By employing a voltage to modify its index of refraction, the electrically controllable waveguide can affect the light passing through it. As a result, the output phase delay of the light signal is equal to some function of the controlling input voltage.

Two more common silicon photonic elements are optical combiners and splitters. Optical combiners have only one output port and two or more input ports, as displayed in figure 3a. The optical signals from multiple sources are merged. When both inputs are at the same wavelength, the signals can interfere constructively or destructively.

Fig. 3: Optical combiner and splitter.

Optical splitters have only one input port and two or more output ports, as demonstrated in figure 3b. The output signals are in phase with equal delays from the input. For a two-branch splitter, the optical signal power at each output is 3 dB below the input, corresponding to half the power, excluding any insertion or transmission losses. The power at each output decreases proportionally for splitters with more than two branches.

Optical fiber example

Consider two multi-die systems connected through an optical fiber, as shown in figure 4. For this simple example, the silicon photonic chiplet in multi-die system A is shown as being a unidirectional transmitter only. In contrast, the chiplet in multi-die system B is shown as being a unidirectional receiver only. In a real-world implementation, both would typically be bidirectional transceivers.

Fig. 4: Two multi-die systems connected via optical fiber.

The most straightforward implementation would involve a single light source in the transmitter chiplet and a single light detector in the receiver chiplet. In this case, the primary die would modulate the amplitude of the light source, thereby superimposing the digital data to be transmitted. The transmitter may employ multiple light sources to maximize the data bandwidth, each operating at a different wavelength.

Assume the silicon photonic transmitter chiplet in multi-die system A employs two light sources, each operating at a different wavelength. Now consider the silicon photonic receiver chiplet in multi-die system B, which requires a method to separate the two wavelengths that make up the combined optical signal. The solution is to implement a tunable optical modulator, as shown in figure 5. This modulator extracts one signal or wavelength at a time; a second modulator is needed to extract the other wavelength simultaneously. Alternatively, adjusting the voltage applied to the electrically controllable waveguides can change the selection of wavelength to propagate over time.

Fig. 5: Implementing an optical modulator.

The combined signal from multi-chip system A is first passed through an optical splitter. The split signals pass through separate electrically controllable waveguides. Electrical signals with the same amplitude but opposite polarity will be applied to the two waveguides, thereby adding unequal phase delay to each branch.

The outputs from the two waveguides are passed into an optical combiner. The optical signals from each waveguide combine constructively or destructively depending on the relative phase at the combiner inputs. The filter can selectively pass only the desired wavelength by properly adjusting the electrical amplitudes.

The challenge

Even in our simple example, the digital SoCs in the multi-die systems could control and fine-tune the functions of their silicon photonics chiplets. When developing a multi-die system of this nature, it is imperative to perform mixed-signal simulations that encompass the analog and digital functionality of the silicon photonic chiplets and the digital functionality in the main SoC.

Semiconductor vendors supply process development kits (PDKs) to their customers. The associated PDK will include models of both the electrical and photonic components for process nodes supporting photonic elements. These models are typically provided in a pure analog modeling language like SPICE or FastSPICE or a conservative modeling language like Verilog-A, Verilog-AMS, or VHDL-AMS.

While these models offer high accuracy and reasonable simulation performance in the analog domain, combining analog and digital simulators to perform analog mixed-signal (AMS) simulation poses significant challenges. The vast amount of inter-process communication will result in simulation runs that are orders of magnitude slower than their purely digital counterparts.

The solution

The solution is a new advancement in Real Number Modeling (RNM). RNM, also known as wreal or wired-real modeling, borrows concepts from the analog and digital simulation domains. The most crucial point for digital design and verification engineers is that RNMs are created in a known language, SystemVerilog. This familiarity allows engineers to perform digital mixed-signal (DMS) verification using traditional software simulators and hardware emulators, as depicted in figure 6. Instead of writing digital models that only accept, manipulate, and generate 0s and 1s, RNMs allow engineers to write models that involve complex mathematical equations and work with real number values like 3.142 or 16.893.

Fig. 6: Model and simulation accuracy vs. performance and capacity for mixed-signal simulation.

The Cadence Xcelium digital simulator fully supports RNM. To provide a point of reference, the company offers a SystemVerilog library called EEnet, which helps engineers include an extra level of reality into the simulation, particularly for specific analog electrical functions. An EEnet library has been created that contains parameterized RNMs representing resistor, inductor, and capacitor (RLC)-type devices, along with diodes, transistors, op-amps, and more.

In cases where the parameters for EEnet library elements have been selected to match the analog components in a foundry PDK, the AMS and DMS simulation results match within 0.1 percent accuracy. The main difference is that the DMS simulation in Xcelium runs orders of magnitude faster than its AMS counterpart while also having the capacity to simulate an entire multi-die system.

Regarding silicon photonics, Cadence has developed a new SystemVerilog library called PhotoNet, along with an associated PhotoNet library of parameterized RNMs. This library represents common silicon photonic elements such as light sources and detectors, simple and electrically controllable waveguides, combiners, splitters, and more. PhotoNet is used to verify that the photonic structures, designed with known voltage effects, function properly within a system, ensuring correct integration with other system components. Using Xcelium with EEnet and PhotoNet, engineers can verify the functionality of a full multi-chip system, including digital controllers, analog electrical, and photonic components.

Conclusion

The integration of silicon photonics with digital and analog circuitry marks a significant advancement in computing and communications. RNM and DMS simulations are essential for meeting these systems’ complex demands, enabling accurate simulations of electrical, optical, and digital domains. By adopting these advanced modeling techniques, engineers can verify the functionality of silicon photonic components within multi-die systems, supporting the development of high-bandwidth, high-capacity requirements for future applications.

In the IEEE paper “Real Valued Models for Verification of Silicon Photonic Systems” author Daniel Cross demonstrates how these tools support functional digital verification of mixed-signal electronic and photonic systems, providing engineers with simulation models and practical examples to streamline design integration. Additionally, Cadence offers video Rapid Adoption Kits (RAKs) that provide code and examples showing users how to model electrical, optical, and digital components together.