Simple formulas no longer apply. There are too many variables, and more on the way.
Throughout 2023, the general consensus among chip industry watchers was that IC sales were flat to down, fueled by market saturation for smart phones and PCs and excess inventory and capacity in DRAM and flash. But that doesn’t tell the whole story, which is becoming highly nuanced and complicated.
Unlike in the past, understanding how the chip industry is faring is no longer a simple math formula. Lines are blurring between chips and systems, and between chips and advanced packages filled with chiplets. And as computing moves beyond the confines of a box and into infrastructure and multiple hyperscale data centers — some of which are developing chips for internal use only — it becomes much more difficult to make broad statements about the industry’s health. In the future, it will need to be analyzed in the context of both new and rapidly evolving horizontal trends, as well as increasingly digitalized and domain-specific vertical markets.
The big horizontal trends to watch are both technology-driven and geopolitical. At this month’s World Economic Forum, two thirds of economists surveyed pointed to generative AI as a bright spot. The general consensus (94%) was that genAI would become economically significant over the next five years in high-income economies. But the economists also noted this is likely to be a case of the haves and have-nots, because it will have little impact on low-income economies. They also pointed to geopolitical fragmentation as a source of volatility, and said industrial policies will create new growth hotspots.
Those same horizontal trends are tightly interwoven throughout the chip industry, and they are particularly apparent in consumer electronics, which despite flattening sales remains the largest single market for chips in terms of volume. It’s not unusual for chips in smart phones to be sold in quantities of hundreds of millions, if not billions. But what worked in the past — packing everything into a single SoC — is becoming untenable as logic continues to shrink and more features are added into devices.
In the next phase of Moore’s Law (and it’s arguable whether that moniker still applies), chips will be decomposed into chiplets or sub-systems, and assembled in unique ways in some type of advanced package. As a result, one device could well include dozens of chiplets, and increasingly they will be a mix of off-the-shelf parts or custom designs. It’s not at all clear how that will impact revenue, but it definitely will send volumes soaring.
The value of these disaggregated parts also will vary significantly, and could well introduce much more volatility into pricing, as supply and demand fluctuates for different chiplets. Even without that localized fluctuation, it’s much easier and less expensive to design an analog chip at 90nm than to scale it down to 3nm using mostly digital circuitry. That increases the number of power, performance, and area/cost (PPAC) options available to chipmakers, and it makes it harder to predict how they will prioritize their choices, which are likely to become increasingly domain-specific.
Physics is an increasingly important economic factor. For example, SRAM has hit a wall when it comes to scaling, prompting chipmakers to replace it with DRAM (and to a much lesser extent MRAM or ReRAM) for L3 cache. This needs to be taken into account when adding up the number of DRAM chips being shipped, which is one of the key measures for how the chip industry is faring. But it’s more complicated than just counting chips in a DIMM slot. New and faster DRAMs will be attached to chips differently using higher-speed PHYs and interposers. Some will contain more data lanes and higher capacity (HBM), while others types (GDDR, LPDDR) will be attached at different places to shorten physical distances for specific functions. And DRAMs may be pooled in data centers using CXL, which will increase utilization.
Regional variables
Another traditional measure for the chip industry involves fab capacity and wafer output. These metrics are becoming fuzzier with advanced packaging and chiplets, but they also are becoming harder to measure in the context of geopolitics. Looking back a year, the supply chain was highly constrained, and it wasn’t unusual for new car buyers and those looking for higher-end appliances to wait six months to a year. What changed in that time was a downturn in the Chinese economy, fueled by a housing crisis that is very similar to the 2008 real estate collapse in the United States, which in turn sparked the so-called Great Recession.
The World Bank projects 2023 GDP growth in China will come in at about 5.2%, and drop to 4.5% in 2024, which is comparable to other estimates. How quickly China recovers will depend on how quickly it works through over-extended credit. That will determine the speed at which jobs and spending ratchet back up, which in turn will fuel demand returns for 200mm capacity. There is more capacity coming online everywhere, but whether it is enough to meet future demand isn’t clear.
There have been numerous reports that fab construction being planned in Europe, the U.S., and Southeast Asia would lead to a capacity glut. But SEMI CEO Ajit Manocha noted in an interview with Semiconductor Engineering that even with all the construction underway, more capacity will be needed to support a $1 trillion industry, a target that big consultancies believe will be achievable somewhere around 2030.
Regardless, the economic picture is becoming muddied due to an increasingly bifurcated supply chain, making the impact of China’s real estate downturn much more difficult to assess. There certainly are fewer Apple products being sold into China these days. But the decrease in manufacturing equipment being sold into China is largely a result of trade restrictions, not economics. That deficit is likely to be softened by heavily subsidized re-shoring and on-shoring of chip manufacturing, packaging, and research in the U.S., Europe, and Southeast Asia once new facilities are built. And it doesn’t help that restrictions are being modified as geopolitical rivalries evolve.
Several other factors need to be considered, including performance, reliability, and pervasive access to compute resources. The buying frenzy at the outset of the pandemic sent chip sales soaring, soaking up any available manufacturing capacity and creating huge shortages for second-tier players, which is why wait times were so long for new cars and appliances. Today, consumer markets are saturated. This is due in part to most buyers hanging onto their devices longer than in the past, when every couple of years brought a significant array of new features, and when their devices began slowing down or the batteries couldn’t hold sufficient charge. In addition, there are more external resources available for processing and storing data.
Just adding more pixels into a smart phone camera isn’t enough to sway most people to go out and buy a new phone, and the performance of laptop computers from several years ago is still sufficient for most tasks — particularly when it’s coupled with high-bandwidth Internet. This is why consumer electronics companies are racing to add generative AI capabilities into their devices. Rather than a generic response to a query from Alexa or Siri, ChatGPT can provide much more tailored information. That, in turn, also will require many more servers, and more powerful servers, and it helps to explain why EDA, and chipmakers like NVIDIA, are on a tear.
EDA growth
According to a just released report from SEMI’s Electronic Design Market Data Report, EDA and IP revenue hit $4.7 billion in Q3 (the latest data available), while the chip industry supposedly was in a downturn. That was a 25.2% increase year-over-year, and IP physical design and verification jumped 45.3%, which is well beyond the exploratory stage of design. These are real chips being developed for real applications, and they are being readied for manufacturing.
Part of this is for chips being developed for edge devices, which includes consumer electronics. But some of it also is being driven by systems companies, which account for roughly 25% of wafers, most of which are being used internally and not sold commercially. Moreover, when systems companies buy EDA tools, they buy everything needed to fully equip an engineer, not just one or two tools. The economics of chip design there are very different than for a consumer device, too, because the value is in the performance and power across an entire data center.
“There is terrific pull through to profit,” said Walden Rhines, executive sponsor of the SEMI Electronic Design Market Data report. “2023 was a minus 10% year for the semiconductor industry, but a strong year of growth for EDA. So how does that make sense. The answer is that companies kept buying, and you’ve got to remember that now we have this phenomenon where a fourth of the foundry wafers go to non-semiconductor companies. We no longer have this correlation with semiconductor revenue. It means that you can get a log of purchases from companies where EDA is not such a big expense to them, and they’re all in the AI race right now. And if you look at where the purchases are for which categories, the one that blew the roof off was IC layout. That means heavy duty design, and actual laying out of chips. This is not just fabless companies outsourcing their layout.”
Fig. 1: Q3 2023 revenue by segment and geographic region. Source: SEMI Electronic Design Market Data
Rhines predicted the EDA industry could well hit $17 billion for 2023, which is rapid growth for this sector. Some of these same drivers also are fueling an increase in M&A activity — Synopsys’ forthcoming acquisition of Ansys for $35 billion is a case in point — as companies position themselves for the next wave of AI, new growth in vertical markets, and take advantage of government funding.
The poster child for growth in AI chips is, of course, NVIDIA. In its third fiscal quarter, ended Oct. 29, NVIDIA reported $18.12 billion revenue, up 206% year over year and a record for the company. Similarly, data center revenue for the company rose 279% year-over-year. But others certainly are gearing up for their slice of the pie. The big question is how much of that will be visible to semiconductor industry watchers.
Landauer formula applies.
https://www.sandia.gov/news/publications/hpc-annual-reports/article/stretching-the-thermodynamic-limits-of-hpc-efficiency/
Missed that design manufacturing is consolidating for cost optimization and design producers when in the way of design manufacturers raw inputs as brokers of components are being removed. mb