Improving Optical Overlay And Measurement

A look at new options for faster throughput.


By Adam Ge and Shimon Levi

Patterning challenges for the semiconductor industry are growing as the number of multi-patterned layers being used in the 10nm and beyond nodes increase. Patterning requires highly accurate overlay which has always been an issue, but with the added complexities of multi-patterning, smaller dimensions and subsequent tightening overlay error budget, it is now a major technical obstacle.

Optical overlay technology is the state-of-the art for 10nm high-volume manufacturing (HVM). Advantages include the ability to image multiple features at high throughput. Current optical tools support the specifications for on-product overlay (OPO) sensitivity, which is a representation of measurement accuracy.

Figure 1. Breakdown of the components of overlay budget calculations in today’s high-volume manufacturing environments.

However, serious concerns with overlay accuracy are reported due to discrepencies between optical overlay results and electric test results. The problem is largely attributed to the optical overlay marks located in the scribe line. Traditionally, overlay marks need to be large enough to suit the optical resolution. But, because the marks are larger than the patterns printed in-die and are further affected due to inherent imperfections and asymmetry that stem from differences in pattern density and local process effects, optical overlay is a poor representation of real die. This has led to calls for developing a reference method to validate a measurement outcome and confirm true overlay accuracy.

As improving overlay control is crucial to yield learning in HVM fabs, we investigated deploying an inline e-beam overlay metrology using a SEM (scanning electron microscope) as a reference metrology for inline optical overlay. We describe our work in a technical paper co-written by Applied Materials and GLOBALFOUNDRIES titled “On-product e-beam Overlay,” presented at the recent ASMC (Advanced Semiconductor Manufacturing Conference) [1].

This research method incorporated high-resolution imaging, physical measurement and a center of gravity algorithm (CoG) to achieve sub-nm precision to indirectly obtain true overlay. Using an accurate and non-destructive metrology technique called random located SEM overlay (RLSO) that selectively samples regions across the field of interest to confirm actual overlay offset was a core part of our study. These regions were measured with e-beam technology that is the only technology with resolution high enough to generate overlay data from the complex small devices.

The high-resolution CD-SEM tool used for RLSO sampling differs from optical overlay that uses visible light. The SEM employs an accelerated electron beam with a spot size as small as a few nanometers, which is a representation of its resolution capabilities. Various types of SEMs are referred as e-beam tools and they not only incorporate high resolution imaging but also physical measurements and metrology algorithms to achieve sub-nm precision, making them suitable for the RLSO methodology in 14nm technology nodes to stride towards 0nm OPO.

In the study, we demonstrated a new, more accurate, reliable and rapid way of achieving the best possible performance for inline control for optical overlay and measurement. The work poses two options: one combined SEM overlay and optical overlay that offers the option to increase the measurement sampling pool by an order of magnitude, enabling a more comprehensive characterization for the whole reticle field. The second is in-die overlay metrology with SEM only. The recent introduction of innovative hardware enables SEM tools to improve throughput significantly.

[1] M. Karakoy, D. Park, Y. Zhou, Z. Ge, A. Siany, “On-product e-beam Overlay,” Proceedings of SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, 2017

—Shimon Levi is a product marketing manager at Applied Materials.


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