A new technical paper titled “Epitaxial Si/SiGe Multi-Stacks: From Stacked Nano-Sheet to Fork-Sheet and CFET Devices” was published by researchers at Imec and Ghent University, et al.
Abstract
“After a short description of the evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes, the manuscript describes the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices. They contain two different Ge concentrations and have been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. Still island growth has been suppressed for Ge concentrations up to 40%. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has also been verified by room-temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.”
Find the technical paper here. January 2025.
Loo, Roger, A. Akula, Y. Shimura, C. Porret, E. Rosseel, T. Dursap, A. Y. Hikavyy et al. “Epitaxial Si/SiGe Multi-Stacks: From Stacked Nano-Sheet to Fork-Sheet and CFET Devices.” ECS Journal of Solid State Science and Technology 14, no. 1 (2025): 015003.
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