Evaluating the health state and degradation rate of a circuit based on in-field measurements.
The automotive industry is undergoing a major transformation with the rise of electrification, connectivity, and autonomous driving capabilities fueling the need for a greater number of more advanced semiconductors. The associated regulatory expectations are also creating challenging safety and reliability requirements for automotive-grade silicon that need to be understood and managed over a wide set of operating conditions and increasingly longer product lifetimes.
What are the requirements for today’s automotive silicon?
The unprecedented use of cutting-edge technology processes, advanced IPs and complex designs expose automotive IC and solutions providers to risks caused by process variability, aging and degradation. Physical defects are unavoidable: test escapes, latent, stress-induced defects. In general stress is an accelerator; parts used “hard” fail faster.
Silicon is intrinsically unreliable and indifferent to safety. It can be made as reliable and safe as needed, provided the costs are paid. These costs include design effort, added circuitry, power and performance overhead, rising exploitation costs and others.
Many products are working under dynamic operating or environmental conditions. Vehicles, in particular, have to handle extreme weather fluctuations, intense vibrations, complex interconnections, and other physical impacts that drive silicon design. Reliability engineers capture this in a list of mission profiles that are used in their failure analysis efforts. The devices are then designed to fulfil the reliability and safety expectations for the representative mission profile. Typical lifetime expectations are often expressed simply as the number of worked hours at a given temperature. Specific to automotive reliability analytics, the (expected) “mission profile” is defined as the collection of relevant environmental and functional loads that a component will be exposed to during its use lifetime and the corresponding worked hours. In its simplest form, the temperature-based mission profile consists in a table with the number of hours spent at a temperature value. More complex scenarios (such as hours spent in park/idle/city drive/highway drive) are also used. During the design phases, all the required due diligence is spent to ensure that the devices will successfully survive the application requirements.
There is a risk that in “harsher” environments, the device may wear-out faster than expected and cause reliability and quality issues. Accordingly, the objective here is to measure and interpret the data measured by in-circuit monitors, compare the actual conditions to expectations, and issue actionable insights to help with the mitigation of operating environment challenges.
A core concept used in these calculations is the stress experienced by the components, evaluated based on operating conditions – such as temperature and voltage. For the vast majority of failure mechanisms, the temperature is a strong acceleration factor, often modeled by the well-known Arrhenius equation. Higher voltages also lead the increased stress, and this can be captured in voltage acceleration or stress factors. Finally, the signals’ state (duty factors) or activity (transitions) play an important role in the aggravation of specific degradation mechanisms.
The opportunity is to recover and interpret the data measured by environmental monitors (Voltage / Temperature / signal and circuit activity / workload and more if available) to build mission profiles that accurately reflect the utilization of the products in-field.
Synopsys has taken a leadership role in building the market for deep-silicon observability through analytics under a broad initiative called ‘Silicon Lifecycle Management’ (SLM). The broad SLM differentiation lies in the ability to enable customers access to silicon-proven sensors IP (both hard and soft) through end-to-end solutions: automated implementation, leverage of sensor data to accelerate new product introduction and yield ramp, insightful analytics during normal in-field operation and ultimately device- and fleet-level lifetime reliability management.
Synopsys provides an extensive library of Process, Voltage and Temperature (PVT) monitors that can be inserted intelligently into the design to monitor environmental and activity data with sufficient space and time granularity. We also provide the analytics collaterals (on-chip and off-chip libraries and toolsets), a predictive framework to process the data into meaningful reliability and functional safety metrics, and dashboard access of the results into actionable fleet-level summaries.
Starting from baseline Meant-Time-To-Failure (MTTF) data provided by the chip suppliers, the accumulated stress progressively reduces the life expectancy of the parts, allowing SLM software – in-field and cloud – to continuously evaluate metrics such as the Remaining Useful Life (RUL), Failure-in-Time (FIT), error rates and updated Safe Operating Area (SOA) for each element on the chip, in the car or in the fleet of cars. Overall, this is a prediction-based, indirect, approach.
Furthermore, the remaining useful life of elements of an item, up to full systems, can be predicted using in-field measurements obtained from in-circuit monitors. Path Margin Monitors (PMM), Process Detectors (PD), Clock and Delay Monitor (CDM), UCIe’s Monitor, and Track and Repair (MTR) IPs provide unprecedented deep silicon data and a more direct measurement of the actual state of the circuit. The collected data will evaluate the health state and degradation rate of the circuit and the current margins in terms of performance. Integrity data from sensors such as logic and memory BIST are also direct measurements of any faults, errors, failures and defects experienced by the circuit. Overall, this is an observation-based, direct, approach.
Lastly, a coherent fleet-level management of aging, degradation and wear-out issues can aggregate sparse and rare degradation events (at device level) to significant trends and observations at the population level and provide an extraordinary insight into the resiliency of the technologies, IPs, and designs.
To address the new semiconductor lifetime challenges, the work group ISO/TR 9839 “Road vehicles – Application of predictive maintenance to hardware with ISO 26262-5” [1] established a list of recommendations for the 3rd edition of ISO 26262. In this proposal, degrading intermittent faults caused by aging or over-stressed conditions must be managed with similar consideration as permanent and transient faults, from early models and design to in-field.
Predictive maintenance concepts can act as competent Safety Mechanisms against degrading intermittent faults, providing ample and timely detection and coverage of intermittent faults. The proposed update of the standard suggests two applications of predictive maintenance techniques.
The first use case investigates faults caused by random events. If the fault leads to an early End-of-Life condition according to known degradation physical laws that can be measured online, in a direct way, then this allows prediction techniques to help mitigate the effects of the fault. This use case can be successfully accomplished using Synopsys in-circuit monitors, RO, PMM, CDM, and MTR, and the associated analytics.
The second use addresses faults caused by systematic circuit degradation. In this context, degradation or aging models can be exercised with actual, measured (“online”) mission profile data to enable end-of-life calculations. This objective is achievable using the proposed prediction-based, indirect, approach where the measured environmental voltage, temperature, workload data provided by Synopsys monitoring IPs is processed through analytics.
Synopsys’ SLM offering provides an extensive library of IP, analytics principles, and technical tools to implement a highly effective Mission Profile analytics and predictive maintenance framework.
The proposed methodology can accommodate state-of-the-art (SOTA), straightforward acceleration factors up to sophisticated sensor-based logic and memory health status evaluation. The provided solution can be implemented economically on-chip or in edge or cloud platforms and provide highly differentiating insights that can be leveraged to improve reliability and in-field operation.
For more information on Synopsys’ SLM solution, visit our website.
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