In-Chip Monitoring Becoming Essential Below 10nm


Rising systemic complexity and more potential interactions in heterogeneous designs is making it much more difficult to ensure a chip, or even a block within a chip, will functioning properly without actually monitoring that behavior in real-time. Continuous and sporadic monitoring have been creeping into designs for the past couple of decades. But it hasn’t always been clear how effective... » read more

Quantifying the Value of On-Chip Debug


White paper authored by Semico Research, quantifies the benefits of using on-chip debug and monitoring technology, specifically UltraSoc's technology. Rising design complexityIn the last several years, contemporary SoCs (system-on-a-chip) have become increasingly complex. They now consist of 100s of millions of gates, 100 or more discrete semiconductor intellectual property (SIP) blocks, hi... » read more

On-Chip Monitoring Of FinFETs


Stephen Crosher, CEO of Moortec, sat down with Semiconductor Engineering to discuss on-chip monitoring and its impact on power, security and reliability, including predictive maintenance. What follows are excerpts of that conversation. SE: What new problems are you seeing in design? Crosher: There are challenges emerging for companies working on advanced nodes, including scaling and trans... » read more

Bugs With Long Tails Can Be Costly Pests


I don’t think Van Gogh was considering high performance computing or server architecture, but he made a lot of sense when he said "great things are done by a series of small things brought together." A series of very small things can, and do, create big things: that’s the fundamental premise of long-tail marketing: Amazon, for one has built a strong business from selling millions of niche i... » read more

Why Pinpoint Accuracy Is Important When Monitoring Conditions On Chip


A Q&A with Moortec CTO Oliver King. Why is there an increasing requirement for monitoring on chip? Since the beginning of the semiconductor industry, we have relied on a doubling of transistor count per unit area every 18 months as a way to increase performance and functionality of devices. Since 28nm, this has broken. As such, designers now need to find new ways to continue increasing... » read more