Reliability Challenges Grow For 5/3nm


Ensuring that chips will be reliable at 5nm and 3nm is becoming more difficult due to the introduction of new materials, new transistor structures, and the projected use of these chips in safety- and mission-critical applications. Each of these elements adds its own set of challenges, but they are being compounded by the fact that many of these chips will end up in advanced packages or modul... » read more

More Data, More Problems In Automotive


The race toward increasing levels of autonomy is being hampered by competitive concerns over sharing data across the automotive supply chain. Pushing past the initial ADAS levels into full autonomy is expected to take more than a decade, but the infrastructure for those systems, and making sure all assisted and autonomous vehicles work with other vehicles, is under development today. Still, ... » read more

Reliability At 5nm And Below


The best way to figure out how a chip or package will age is to bake it in an oven, heat it in a pressure cooker, and stick it in a freezer. Those are all standard methods to accelerate physical effects and the effects of aging, but it's not clear they will continue working as chips shrink to 5nm and 3nm, or as they are included in multi-die packages. Extending any of those kitchen-like appr... » read more

Planning For Failures In Automotive


The automotive industry is undergoing some fundamental shifts as it backs away from the traditional siloed approach to one of graceful failure, slowing the evolution to fully autonomy and rethinking how to achieve its goals for a reasonable cost. For traditional automakers, this means borrowing some proven strategies from the electronics world rather than trying to evolve traditional automot... » read more

The Race For Better Computational Software


Anirudh Devgan, president of Cadence, sat down with Semiconductor Engineering to talk about computational software, why it's so critical at the edge and in AI systems, and where the big changes are across the semiconductor industry. What follows are excerpts of that conversation. SE: There is no consistent approach to how data will be processed at the edge, in part because there is no consis... » read more

Degradation Monitoring – From Vision to Reality


Reliability physics has historically focused on models for time-to-failure, but that approach is reaching its limit. Those models generally were developed using data gathered from very simple test structures that could be stressed to failure. Today, with electronics playing a such a critical role in our everyday life, failures are no longer an option. The underlying ICs being implemented call f... » read more

Factoring Reliability Into Chip Manufacturing


Making chips that can last two decades is possible, even if it's developed at advanced process nodes and is subject to extreme environmental conditions, such as under the hood of a car or on top of a light pole. But doing that at the same price point as chips that go into consumer electronics, which are designed to last two to four years, is a massively complex challenge. Until a couple of y... » read more

Test Moving Forward And Backward


Test, once considered an important but rather mundane way of separating good chips from the not-so-good and the total rejects, is taking on a whole new life. After decades of largely living in the shadows behind design and advancements in materials and lithography, test has quietly shifted into a much more critical and more public role. But it has taken several rather significant shifts acro... » read more

Algorithms And Security


From a security standpoint, the best thing AI has going for it is that it's in a state of perpetual change. That also may be the worst thing. The problem, at least for now, is that no one knows for sure. What’s clear is that security is not a primary concern when it comes to designing and building AI systems. In many cases it’s not even an action item because architectures are constantly... » read more

The Growing Uncertainty Of Sign-Off At 7/5nm


Having enough confidence in designs to sign off prior to manufacturing is becoming far more difficult at 7/5nm. It is taking longer due to increasing transistor density, thinner gate oxides, and many more power-related operations that can disrupt signal integrity and impact reliability.  For many years, designers have performed design rule checks as part of physical verification of the desi... » read more

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