New Materials Era In Advanced Interconnects

Interconnect performance and reliability are getting progressively more difficult to maintain at each new process node. Something has to change.

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By Kavita Shah
Growth in semiconductors today is driven primarily by mobile applications and this demand continues to increase with no slowdown in sight. Supporting this trend, chipmakers continue adding smaller and faster transistors to chips to maintain the pace of Moore’s Law, and as a consequence copper wiring is being drastically scaled and densities increased.

Today advanced chips can feature up to 15 layers of copper metallization and more than 7 linear miles of wiring embedded in a square-inch 28nm chip layout—a distance that will only increase as transistor density increases and additional metal levels are added. At these dimensions it becomes exceptionally difficult to achieve perfect copper fill in 100% of the trenches and vias that make up the circuitry of a device. Other performance-degrading effects, such as electro-migration, which can cause movement of copper that leaves voids in the wiring, also become significantly more problematic. The smallest defect can kill a device; interconnect performance and reliability begin to suffer under these conditions. For chipmakers, this means yield issues. For consumers, it means mobile devices that they rely on may fail or not function correctly.

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Higher densities at smaller nodes generate several new manufacturing challenges, specifically in the ability to fill narrow geometries and to extract reliable performance from the wires and interconnects. As a result, the industry needs new materials that can keep extending copper technology to maintain the pace of Moore’s Law.

The deposition of thin conformal and selective cobalt films for manufacturing the copper circuitry that connects billions of transistors in today’s integrated circuits, marks the biggest change in the copper interconnect in the last 15 years.

New Materials Era for Interconnects
Applied Materials’ new Endura Volta CVD system is a major technical achievement in precision materials engineering to alleviate roadblocks to copper interconnect scaling beyond the 2Xnm node through two enabling applications—a conformal cobalt liner and a selective cobalt capping layer, which together completely encapsulate the copper wiring.
Cobalt is a phenomenal new material, primarily because it has several good characteristics. It offers low resistivity and adheres well to copper and barrier layers. Plus, there is flexibility in depositing and tuning this material—making it production friendly.

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In the first new process step, CVD cobalt enables the thin, continuous deposition for the liner layer that optimizes the subsequent copper seed layer, driving good plating performance and, ultimately, reliable device performance.

The second cobalt process deposits a selective CVD cobalt capping layer after the chemical mechanical polishing (CMP) step on copper lines to reduce electro-migration. The cap immobilizes the atoms at the surface of the copper, promoting good adhesion of the copper lines to the subsequent dielectric barrier layer.

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What Applied Materials has done by enabling the two new process steps—the Volta CVD system’s cobalt liner and selective cobalt capping layer—is to demonstrate improved copper gap fill and an order-of-magnitude reduction in electro-migration. These are critical to extending Moore’s Law beyond 20 nanometers.