tag: CVD

Research Bits: Dec. 3
By Jesse Allen - 03 Dec, 2024 - Comments: 0

Self-assembly of mixed-metal oxide arrays Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling electronic devices. The proof-of-concept work was used to create diodes and transistors with high yield and could be used for more complex electronic devices. “Our self-assembling approach is significantly faster and less expensi... » read more

Research Bits: Aug. 27
By Jesse Allen - 27 Aug, 2024 - Comments: 0

Ammonia-free GaN Researchers from Nagoya University discovered a way to grow gallium nitride (GaN) semiconductors without using ammonia. The process is both more environmentally friendly and allows for high-quality growth of crystals at a lower cost. Metal organic chemical vapor deposition (MOCVD) is the most common technique for GaN production, which uses ammonia (NH3) gas as the source of... » read more

Properties of Commercially Available Hexagonal Boron Nitride Grown By The CVD Method
By Technical Paper Link - 29 May, 2024 - Comments: 0

A new technical paper titled "On the quality of commercial chemical vapour deposited hexagonal boron nitride" was published by researchers at KAUST and the National Institute for Materials Science in Japan. Abstract "The semiconductors industry has put its eyes on two-dimensional (2D) materials produced by chemical vapour deposition (CVD) because they can be grown at the wafer level with sm... » read more

Predicting And Preventing Process Drift
By Gregory Haley - 22 Apr, 2024 - Comments: 0

Increasingly tight tolerances and rigorous demands for quality are forcing chipmakers and equipment manufacturers to ferret out minor process variances, which can create significant anomalies in device behavior and render a device non-functional. In the past, many of these variances were ignored. But for a growing number of applications, that's no longer possible. Even minor fluctuations in ... » read more

Enabling Advanced Devices With Atomic Layer Processes
By Katherine Derbyshire - 18 Apr, 2024 - Comments: 2

Atomic layer deposition (ALD) used to be considered too slow to be of practical use in semiconductor manufacturing, but it has emerged as a critical tool for both transistor and interconnect fabrication at the most advanced nodes. ALD can be speeded up somewhat, but the real shift is the rising value of precise composition and thickness control at the most advanced nodes, which makes the ext... » read more

Navigating the Metrology Maze For GAA FETs
By Gregory Haley - 08 Aug, 2023 - Comments: 1

The chip industry is pushing the boundaries of innovation with the evolution of finFETs to gate-all-around (GAA) nanosheet transistors at the 3nm node and beyond, but it also is adding significant new metrology challenges. GAA represents a significant advancement in transistor architecture, where the gate material fully encompasses the nanosheet channel. This approach allows for the vertical... » read more

Optimizing The Growth And Transfer Process of Graphene (Cambridge, RWTH Aachen)
By Technical Paper Link - 21 Apr, 2023 - Comments: 0

A technical paper titled "Putting High-Index Cu on the Map for High-Yield, Dry-Transferred CVD Graphene" was published by researchers at University of Cambridge, RWTH Aachen University, and National Institute for Materials Science. Abstract: "Reliable, clean transfer and interfacing of 2D material layers are technologically as important as their growth. Bringing both together remains a ch... » read more

2D Semiconductor Materials Creep Toward Manufacturing
By Katherine Derbyshire - 16 Feb, 2023 - Comments: 0

As transistors scale down, they need thinner channels to achieve adequate channel control. In silicon, though, surface roughness scattering degrades mobility, limiting the ultimate channel thickness to about 3nm. Two-dimensional transition metal dichalcogenides (TMDs), such as MoS2 and WSe2, are attractive in part because they avoid this limitation. With no out-of-plane dangling bonds and at... » read more

How Far Will Copper Interconnects Scale?
By Laura Peters - 15 Dec, 2022 - Comments: 0

As leading chipmakers continue to scale finFETs — and soon nanosheet transistors — to ever-tighter pitches, the smallest metal lines eventually will become untenable using copper with its liner and barrier metals. What comes next, and when, is still to be determined. There are multiple options being explored, each with its own set of tradeoffs. Ever since IBM introduced the industry to c... » read more

High-Temperature Stable Spin-On Carbon Materials For Advanced Pattern Transfer Applications
By Brewer Science - 16 Jun, 2022 - Comments: 0

In recent years a strong demand has arisen for spin-on carbon (SOC) materials compatible with high-temperature processes. This requirement is to enable usage of high-temperature SOC (HTSOC) materials in integration schemes utilizing chemical vapor deposition (CVD) and/or atomic layer deposition (ALD) processes. In addition to compatibility with the high-temperature deposition processes, planari... » read more

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