Energy Boost For Power Standards

If the amount of standards work and industry effort that is being expended on a given topic is any indicator of the growing importance of a design concern, then power has most certainly become the hottest topic in the industry. Thankfully, it seems as if everyone has learned their lessons from the CPF/UPF struggles and is attempting to coordinate activities, while at the same time allowing separate groups to innovate and explore their respective solution spaces.

This time around, it is not Accellera who is taking the lead. “Accellera doesn’t have an active working group on power,” says Adam Sherer, promotions group chair for Accellera. “We applaud the work in the IEEE to build on the UPF standard rooted in Accellera.”

Learning from the past
“Accellera initiated the UPF project in the 2005 to 2006 timeframe,” recalls Yatin Trivedi, director of standards and interoperability programs at Synopsys. Trivedi led a recent IEEE Low Power Study Group (LPSG) and is the vice chair of the IEEE Design Automation Standards Committee (DASC). “After UPF was approved as an Accellera standard, it was contributed to the IEEE 1801 working group in 2007. Since then, many members of the Accellera UPF working group have become active contributors in the IEEE 1801 working group, and many new contributors from user and vendor communities have joined the effort. There is no need for Accellera to continue a parallel or shadow development of the standard.”

The recently concluded IEEE Low Power Study Group resulted in two additional IEEE working groups being formed: IEEE P2415, Standard for Unified Hardware Abstraction and Layer for Energy Proportional Electronic Systems, and IEEE 2416, Standard for Power Modeling to Enable System Level Analysis. Both of these groups are looking at higher levels of abstraction than the existing efforts within IEEE 1801.

The first study group was hosted by Si2, which has had a Low Power Coalition (LPC) working in this area for some time. “Energy builds around something,” says Steve Schulz, president and CEO at Si2, “and then if you don’t move out in front of it, there is a risk that there will be divergence with different groups doing things in different ways. This is what happened with UPF and CPF. We don’t want that to happen again or to allow EDA vendors to battle with each other as they often do.”

One way in which Si2 is hoping to ensure openness is by the creation of a patent. “There is a pending patent on the core technology called ‘Multi-level abstract power modeling method US 20140107999 A1’,” says Schulz. “The reason we did a patent was to recognize the author and to ensure the investment of our members and the industry has made into this does not get lost.”

Patents associated with standards are always an interesting, and sometimes controversial subject. “When standard-essential patents are licensed under Fair, Reasonable, and Non-discriminatory (FRAND) terms, the market benefits,” says Trivedi. “Yet defining FRAND is not necessarily easy. The IEEE is currently proposing changes to its patent policy that could help clarify FRAND. If Si2 offers its patent under FRAND terms that the market accepts, then yes, it could be a good idea. And, if the patented technique is practical and useful, of course, it would be a good idea.”

Schulz explains the motivation for the work in the Si2 LPC. “The need for power models has been there a long time and leading companies have been doing stuff here for 10 or 15 years. This is usually at the cell level. It is about implementation, netlist, to cell and macro cell; most of it is post-synthesis. The problem is that higher-level modeling requires more complex equations and algorithms and more complex semantics. At the higher levels, power is more complex than timing and you have to consider peak power, average power, dynamic power, leakage, context dependent power based on physical placement, hot spots with thermal considerations, packaging considerations and more.”

Thermal modeling is getting its share of attention now, as well. “Several of our customers have started to show interest in not only high level power modeling but also thermal modeling,” says Vic Kulkarni, senior vice president and general manager for the RTL power business within ANSYS/Apache. “Both are needed to make architectural decisions for energy-efficient designs targeted at the emerging IoT applications.”

Nagu Dhanwada, low power tools and methodology lead within IBM and the chair of both the Si2 Low Power Coalition and the newly formed IEEE 2416 committee, talks about their needs as a processor design company. “We want a process, voltage, temperature (PVT) independent power contribution model. This means that instead of putting power numbers into the power model (leakage or dynamic), we put the contributing aspects to power in the model. So instead we talk about the leaking width per device type or the capacitance that is switching rather than the dynamic power number. This creates the notion of portable models which can be built ground up. From these we can build higher-level abstractions.”

At the high level things used to be done using spreadsheets, and the architect would use the spreadsheets to get the numbers. The industry has lacked the ability to verify those numbers and design decisions as the design progresses. “There have only been a few EDA vendors that have been able to get enough adoption to survive at that higher level,” says Schulz, “and they are small. One of the reasons is that if you don’t create a standard to make it more efficient to create the models, these different approaches are all extra effort. This has held our industry back for a long time.”

“Within LPC we were trying to take a flow-centric approach to the problem,” says Dhanwada. “Before we even started the modeling working group we spent some time defining what an ideal flow would look like. This covered ESL, RTL and implementation and we identified the kinds of information that would have to be exchanged.”

Gerald Frenkil, a low-power design consultant with Si2, is the author of the patent. He had the idea of a way to write the model once, and if done in a certain way, have a common body of the model and then an interface around it. The interface can look like a transaction level interface, or a system-level interface or untimed TLM or timed RTL or gate level. The model then can be refined during the flow. Si2 plans to conduct a pilot program around this new approach and if successful to donate this technology into the IEEE 2416 committee.

IEEE P2415 also fills a whole in the flow at the moment. While IEEE 1801 (UPF) looks at the power intent from a hardware perspective, the role of IEEE 2415 will be to provide an external view of that, which can be used to help drive the software flow and hardware-software integration.

It would appear, on the surface, that the information content necessary for 2415 and 1801 should have a lot in common and potentially cause problems if these two documents are not kept in lockstep. “The bigger challenge to us is that there is a third activity inside of P1801, called IEEE SLP, whose scope is also ‘system power modeling’, says Kulkarni, “This is creating a lot of confusion between the charter of the new PARs and the group under the 1801. P2416 would focus on how to create multi-level power estimation models and get stimuli to stimulate them, while the IEEE SLP focuses on how to attach power consumption functions to IPs and define IP power states. SLP does not care that much about where the power consumption functions and the signals that activate the power states come from.”

“These issues were discussed by the LP study group and this concern was addressed when the Project Authorization Requests (PAR) were created,” explains Trivedi. “The plan is that the three groups will have a coordinating committee made up of each chair and vice chair as well as Stan Krolikoski, distinguished engineer at Cadence and chair of the IEEE DASC. This will make sure that there is enough opportunity for each committee to exchange information and direction. It is easy to say that they will always remain aligned but they have to have something concrete to work with. To talk about alignment or lack of it in a vacuum is rather difficult. We must give them the opportunity to build something and then to ensure they do not become incompatible.”

Both of the new IEEE groups are planning to have their first meeting sometime in November.