New Silos Form In IC Industry

By Ed Sperling
For the past couple of decades corporations around the globe have been focused on down silos. In fact, it has become a mantra. It’s considered essential for making established corporations even more successful, and it’s almost always at the center of turnaround plans for troubled companies. Moreover, across a full spectrum of companies, it’s regularly cited by management consultancies in reports to their clients.

Nowhere has adoption been more widespread than in the semiconductor industry, which has a laser focus on efficiency. But since 180nm, when the foundry model really began taking hold—and at 40nm, when commercial IP and the focus on re-use of internal IP began picking up steam—silos have been sprouting back up. And so have questions about what slice of this approach work best, when and where it works, and what comes next.

“Silos inject predictability,” said Jack Harding, president and CEO of eSilicon. “What’s different, though, is that we’ve added flexibility into this process—the flexibility to re-form a silo on a temporary basis with a predictable outcome.”

This is a far cry from the silos that existed in 2000, when design flows were sequential. If engineers followed the rules back then, they generally could count on a working chip to pop out at the end. “About the time we reached the 65nm process node, that changed,” Harding said. “We now require things to be done in parallel. The most extreme example of this is layout with package design. There are still some things that must be solved separately, but the buckets are becoming smaller.”

Silos between companies
Most of the obvious silos that have been created over the past few years are between companies rather than within them, largely as a result of disaggregation of the supply chain. The foundry model was built on that premise. It’s simply too expensive to equip an advanced fabrication facility for complex SoCs, so even the largest companies are either using foundry services, or selling them to offset the costs of running their own fabs.

“One of the questions this raises is whether it will impact freedom of choice for customers,” said Qi Wang, technical marketing group director at Cadence. “There is a cost to change and verify if you go from one foundry to another. That cost may be bearable for a large company, but smaller companies can’t afford that.”

Wang noted that the Internet of Things (IoT) raises new concerns because of the number of communications protocols that are emerging along with the IoT. “Over time, standards will remove silos,” he said. “This is a new area that will be consolidated, but it will take time until all of those protocols are reviewed.”

IP is another area where silos are prevalent. It’s time-consuming to re-invent IP at each new process node or for each new product, which is why standardized IP has become so important. Cadence and Synopsys both offer a variety of IP—some standard, some packaged into subsystems. So do ARM and Imagination Technologies. And so do Arteris and Sonics, which provide IP for simplifying the connection of IP. In fact, an entire ecosystem has built up around these IP silos, for testing, integrating and developing software.

“There are different meanings for silos in IP,” said Wang. “One involves standard IP companies, which are trying to offer differentiation in PPA (power, performance and area). The second involves integration-ready IP, where the models and constraints are defined so you can integrate the IP quickly. There are silos there, but over time, everyone will want plug-and-play IP and standards to make that happen.”

Silos within companies
There are mixed opinions about just how effective silos are within companies. Silos have proponents and detractors, and flexible walls between silos tend to blur the lines. The reality is there is no simple answer, because corporate structures are as complex as the chips being built or the ecosystems around various technologies.

“The real challenge with getting rid of silos is that to do it right everyone has to know what everyone else is doing,” Jon McDonald, technical marketing engineer for the design creation unit at Mentor Graphics. “Where silos can work is when you isolate the information, but not the quality or the analysis of that information.”

In effect, that means raising the abstraction level of the information within a company, an approach the semiconductor world has embraced to deal with the rising volume of data. “When you look at ARM, there are lots of models being created and customers use those models effectively. But those models are developed in a silo and made available to other companies. It’s the same for hardware and software silos within a company. There’s a lot of talk about software engineers needing to know more details about hardware, but that’s not right. What they need is feedback of the impact of each on the other.”

The trick in that case is being able to glean the information that’s necessary, but stay focused on the core mission.

“Silos have their place, because they give focus and allow you go get things done that are critical,” said Cary Chin, director of marketing for low-power solutions at Synopsys. “But with low power, that didn’t help because power affects everyone. Twenty years ago, design and test were more separate. Now they’re integrated. There are a lot of things like that and companies build walls to get things done. But you also need to make the walls moveable.”

Chin pointed to skunk works projects within companies, which by nature are silos because they’re typically kept secret even from other employees. He said what’s required there is a good methodology, and it has to be able to integrate into the corporate process when necessary.

Building bridges
One approach to making silos work is an information bridge. The most painful example to crop up in recent years involves the dueling power formats, UPF and CPF. The current standard has solved almost all of the thorny issues that plagued design teams for the past couple of process nodes. In that case, the silos were large EDA companies each promoting their own standards, and the bridge was built by industry standard organizations.

Network on chip technology serves a similar purpose, unifying multiple IP protocols and standards so that IP can be integrated more quickly. “One of the values of a flexible interconnect IP is that it can bridge silos created by various IP vendors and EDA design methodologies,” said Charlie Janac, president and CEO of Arteris. “Silos are bad overall because they represent local versus global optimizations. While it is good that local solutions are found within a silo, the overall system solution can suffer. System issues are what drives user experience and silo approach can get in the way of a great user experience.”

But there are times where silos really work well. Consider the collaboration between Microsoft and Intel, for example, also known as the famed Wintel alliance. The two developed a series of well-defined interfaces that made the entire PC era possible. There also are times where they fail miserably, as in the early 2G cell phone days.

“The 2G cell phones were basically a microprocessor and a DSP,” said Drew Wingard, CTO of Sonics. “ARM had a good understanding of how to package well-defined interfaces. The DSP groups gave you an execution of a DSP, and it was your job to understand how to use it, how to build in caches, how to develop compilers, and you were on your own to figure out software libraries. That explains why the growth of these two types of companies was very different. ARM’s microprocessor wasn’t considered very important back then.”

Wingard noted that the boundary between hardware and software continues to be “jagged” for most companies due to the silo effect.

Conclusions
Silos serve a purpose and they also get in the way—but not all the time. The challenge is figuring out when to use them, how to use them, how to build bridges to minimize the negatives, and to manage them closely.

That’s easier said than done, of course. Many times, new technologies don’t take off as quickly as expected or they take off too quickly. Synopsys’ Chin pointed to 3D printing as a technology that could radically alter silo behavior because it can change the entire manufacturing cycle.

A similar argument can be made for hardware and software, as the amount of software required to be bundled into chips increases and as the restrictions on the energy efficiency of that software increase. Mentor’s McDonald said the challenge there is providing useful information to hardware and software teams so they each can work with the other, rather than trying to tear down the silos that naturally exist between those worlds.

That’s a steep challenge, which is why hardware-software co-design has limped along for the better part of two decades. And while power concerns makes the issue more pressing to deal with, the solutions that are emerging are more bridge-building approaches than silo-busting. But not all.

Consider Apache Design’s approach. The company is advocating dedicated private clusters of servers for signoff in order to get the job done on time, according to company president Andrew Yang. “We’re going to propose more private clusters dedicated for signoff,” Yang said. “Designers are not going to wait weeks for results and the amount of time they allocate for signoff will not change.”

Silos will continue, they will move, and they will crop up in new areas. But the reality is they will never completely disappear because they are a driver of innovation and new technology—despite an ongoing barrage of criticism.