Experts At The Table: Improving Yield


y Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield issues with Sesh Ramaswami, senior director of strategy at Applied Materials; Luigi Capodieci, R&D fellow at GlobalFoundries; Kimon Michaels, vice president and DFM director at PDF Solutions; Mike Smayling, senior vice president at Tela Innovations; and Mark Mason, director of data integration at Texas Instrum... » read more

TSVs Ease Heat In 3D ICs


By Ann Steffora Mutschler In the evolving discussion of 3D ICs and through silicon via (TSV) technology, a key issue engineering teams are facing today is how to reduce the thermal coefficients between substrates in a stacked die. Simply put, what is the best way to get the heat out of the 2.5 or 3D IC? The answer, of course, is anything but simple. “In a 3D system, the heat hierarchy ... » read more

Interconnect Power


By Barry Pangrle Applied Materials announced its latest version of nano-porous low-k dielectric technology called Black Diamond 3 last month at Semicon West. What really caught my ear though was the marketing claim that 1/3 of total chip power consumption (really energy) is in the interconnect. I thought about this a bit, and certainly for some designs this seemed to easily be quite po... » read more

IC Yield Issues


What makes one semiconductor design yield better than another. And what issues are we likely to face going forward. Semiconductor Manufacturing & Design questions Amiad Conley from Applied Materials; Cyrus Tabery from GlobalFoundries; Brady Benware from Mentor Graphics, and Ankush Oberai from Magma. [youtube vid=1YjY436YmNQ] » read more

Experts At The Table: Yield Issues


By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

Experts At The Table: Yield Issues


By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

Experts At The Table: Yield Issues


By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

The Growing Legacy Of Moore’s Law


By Ed Sperling Moore’s Law has defined semiconductor design since it was introduced in 1965, but increasingly it also has begun defining the manufacturing equipment, the cooling needed for end devices, and both the heat and performance of systems. In the equipment sector the big problem has been the delay in rolling out extreme ultraviolet (EUV). Moore’s Law will require tighter spacing... » read more

The Future Of 3D Stacking


By Ed Sperling Despite concerns about the lack of tools, an unstable process, questionable interconnects, thermal overloads and electrostatic discharge, 3D stacking appears to be making headway. At the very least, lots of companies of all sizes are betting heavily that it will succeed. The first wave, which is expected to start showing up late next year, will likely come from a handful of t... » read more

Extending Moore’s Law


By Ann Steffora Mutschler For Moore’s Law to perpetuate, the materials used in semiconductor manufacturing must do their part to allow the scaling of devices to occur. Some of the latest include a carbonless film deposition technology for 20nm transistors and smaller, a plastic memory device and a material compound of silicon, copper, nickel and iron that researchers believe could lower manu... » read more

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