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Plasticine: A Reconfigurable Architecture For Parallel Patterns (Stanford)

Stanford University has been developing Plasticine, which allows parallel patterns to be reconfigured.

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Source: Stanford University

Stanford University has been developing Plasticine, which allows parallel patterns to be reconfigured.

“ABSTRACT Reconfigurable architectures have gained popularity in recent years as they allow the design of energy-efficient accelerators. Fine-grain fabrics (e.g. FPGAs) have traditionally suffered from performance and power inefficiencies due to bit-level reconfigurable abstractions. Both fine-grain and coarse-grain architectures (e.g. CGRAs) traditionally require low level programming and suffer from long compilation times. We address both challenges with Plasticine, a new spatially reconfigurable architecture designed to efficiently execute applications composed of parallel patterns. Parallel patterns have emerged from recent research on parallel programming as powerful, high-level abstractions that can elegantly capture data locality, memory access patterns, and parallelism across a wide range of dense and sparse applications.”

For more info, please see technical paper here

 



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