Reliability Performance Of S-Connect Module (Bridge Technology) For Heterogeneous Integration Packaging

With the explosive increase in demand for artificial intelligence (AI), autonomous driving, Internet of Things (IoT), data centers, augmented reality and virtual reality (AR/VR), the market of high-performance computing (HPC) applications is growing rapidly [2]. And, the HPC market requires high processing speed, fast network clusters and large parallel computing. To meet the market requirements, system-on-chip (SoC) technology provides higher interface speed of each functional die within a single chip. However, as the length of the transistor node is down to a few nanometers with larger SoC trends, challenges have occurred, such as high cost, yield drop, and long development time [3,4].

Heterogeneous integration (HI) package technology integrates multiple dies with different intellectual properties (IPs) and has been emerging for securing high yield and fast development. The HI benefits include: 1) known good dies (KGD) can be used with various customers, 2) higher yield can be achieved due to using small dies, 3) design flexibility for the large sized package is possible with different nodes [5]. To enable the HI technology, the die-to-die (D2D) interconnection method needs to evolve into a split partitioning of dies and high-bandwidth memory interface. Fast and rigid D2D routing methods have been developing with interposer technology [6,7].

Bridge technology is the extended platform of 2.5D silicon (Si) interposer that can break through the limitations of the large Si interposer fabrication. Since localized Si bridged die is applied only to D2D interconnections, it can take advantage of not only Si interposer functionality but also leverage the sourcing of small connect die sizes. Moreover, interconnection reliability can be improved: 1) the power delivery line from the top die to the substrate can be connected using Through Mold Via (TMV) technology and 2) integrated passive devices (IPDs) can be embedded in the mold area under the top die.

Fig. 1: Schematic image of S-Connect package with bridge technology.

Amkor’s bridge technology, called S-Connect, was demonstrated using a chip-first process with double-side soldering in 2021 [1]. In this study, the mechanical test vehicle (mTV) of S-Connect was developed based on face-up bonding and a chip-last process. This paper discusses the optimal conditions for the S-Connect assembly processes with simulations. The bridge modules were fabricated with two main factors: 1) epoxy molding compound (EMC) materials, and 2) top die thickness. The S-Connect mTV demonstrated from 850 mm² up to 2500 mm² module size capability and passed the JEDEC standard component level reliability tests.

S-Connect technology

Structure of S-Connect package

In figure 1, the S-Connect package is largely divided into three parts: 1) a multi-die attached layer with micro-bump (μbump), 2) molded tall pillars and thin connected die and 3) module-controlled collapse chip connection (C4) area attached to a substrate. The double-side redistribution layers (RDLs) are made for connecting connect die/tall pillar to μbump and C4. The mTV uses dummy ASIC, dummy HBM and RDLs for routing each component with bump joints. The chip-last (CL) process was adopted to leverage the use of known-good-die and provide reduced cost and improved yield efficiency.

Process flow of S-Connect package

The process flow of S-Connect is illustrated in figure 2. The connect die and IPD with copper (Cu) stud were face-up bonded on the carrier wafer which has tall Cu pillars. The connected die and IPD were embedded by the first molding process and mold grinding was carried out to expose Cu post and Cu stud as shown in figure 2 (b). After mold grinding, RDLs were fabricated on the mold with solder capture pads and top dies attached with μbump to the RDL pad. The reflow process was conducted for the solder joint and followed by an underfill process. The second mold and mold grinding process were carried out to encapsulate the Si dies and to expose the top side of the Si dies. C4 bumps were plated on the bottom side of the mold for building joints to the substrate. Lastly, a common flip-chip process was used to assemble the S-Connect module and substrate.

Fig. 2: Process flow of S-Connect package.

Items	mTV1	mTV2
PKG size	67 x 67 mm2	85 x 85 mm2
Module size	33 x 26 mm2 (1x reticle)	54 x 46 mm2 (3x reticle)
ASIC	1 ASIC, 23 x 24 mm2 50um pitch	2 ASICs, 24 x 26 mm2 50um pitch
HBM	2 HBM2, 8 x 12 mm2 55um pitch	8 HBMs, 11 x 10 mm2 55um pitch
Connect die	2 Connect dies 7 x 6 mm2	10 Connect dies 6 x 6 mm2/ 3 x 8 mm2
Structure

Table 1: Information on mechanical test vehicles.

Mechanical test vehicles information

The mTVs of the S-Connect module are prepared as shown in table 1. Two types of mTVs were prepared for the demonstration. The mTV1 consists of 3 dies (1 dummy ASIC, 2 dummy HBMs) and 2 connect dies. The module size of mTV1 is about 33 x 26 mm² (1x reticle size) and the connect die has a square shape. The mTV2 has a dimension of about 54 x 46 mm² (3x reticle size). This module has 10 dies (2 dummy ASICs, 8 dummy HBMs) and 10 connect dies.

Package warpage investigation

Package warpage is the dominant value to determine the success level in assembly. The mechanical modeling was carried out to estimate the warpage behavior of the mTV module. The two targets for DOE and the simulation include: 1) different EMC materials and 2) thickness of dies. Ansys Parametric Design Language (APDL) Mechanical 16.1 was used for modeling and the simulations were carried out in the ranges from room temperature (RT) (25°C) to high temperature (HT) (250°C). Mechanical simulation is a good way to study the risk assessment about warpage and determine key parameters before the actual fabrication.

Table 2: Properties of epoxy mold compound materials.

Table 3: Warpage simulation on S-Connect and module.

Mold compound material properties

The S-Connect process contains 2-step molding: 1) the connect die and tall Cu pillar for vertical interconnection are embedded in the mold compound by first molding, 2) the top attached chips are encapsulated by a second molding. At this point, EMC selection and evaluation are needed to control the warpage for process feasibility and final package quality.

Three different EMC materials were selected, as described in table 2. These EMCs have various glass transition temperatures (Tg) and coefficients of thermal expansion (CTE) properties. In this DOE, the Tg is varied from 145°C to 175°C and CTE ranges from 7 to 12 (< Tg) and from 22°C to 46°C (> Tg), respectively.

Warpage simulation DOEs on EMC materials

Table 3 is the summary of DOE legs for simulation, which are the combinations of EMC materials listed in table 2. The mTV1 structures for modeling were applied as shown in table 1. Figure 3 shows that all legs in the DOE have the same warpage trends depending on the temperature as followed: crying mode in RT and smile mode in HT. It shows that legs #7-9 have about 30% higher warpage than others in RT. In HT, the warpage of legs #4-6 and legs #7-9 was about 20% and 60% higher than legs #1-3. This confirms that it is good to use the EMC material with low CTE for minimizing module warpage.

Fig. 3: Warpage simulation results according to EMC with different CTE.

To understand why the first mold affects the mTV more than the second mold, the structure of the S-Connect was investigated. In the S-Connect module, the area occupied by the first mold and the second mold is 31.6 mm³ and 20.2 mm³, respectively. The occupied area of the first mold is about 56% more than the second mold. Therefore, warpage behavior is more affected by the property of the first EMC material than the second EMC material.

Warpage simulation DOEs on die thickness

Warpage behaviors were simulated according to the thickness variations of the top attached dies. The parameters from the EMC combination leg #1 in table 3 were investigated. When the die thickness was 650 µm, it showed the lowest warpage behavior. The warpage of 650 µm die thickness was about 51% and 48% lower in RT and HT than the warpage of 450 µm die thickness, respectively. Analysis shows:

Fig. 4: Warpage simulation results on various thickness of top Si die.

• Modulus difference: the modulus of Si and EMC material is 120 GPa and 19 GPa (< Tg)/ 1.6 GPa (> Tg), respectively. The Si has about 6x higher modulus than the EMC material.
• Volume of each material: the occupied volume of the Si top die is changed when the thickness of the Si die was varied from 450 µm to 650 µm. The area of mold increased by only about 16% compared to Si die about 45% increase. It means that the Si effectiveness of warpage control is 3 times larger than mold.

Therefore, the thickness of the Si die was confirmed to be more effective than the EMC material on the change of module warpage.

Fig. 5: Warpage comparison between simulation and actual module.

A comparative study was conducted of warpage data from the simulation and actual module as shown in figure 5. The shadow moiré can collect temperature-dependent warpage data in real-time for comparison. The simulation and actual mTV1 module showed good alignment. Specifically, the solder joint zone, which is used to form C4 melting and bonding completion, keeps a nearly flat warpage tendency. It is possible to secure a good solder joint quality and process window for the S-Connect module attached to the substrate.

Package fabrication results

mTV1 (1x reticle size) S-Connect package module

Figure 6 shows the overall structure and cross-section images of the S-Connect package. Tall Cu pillars that provide a vertical interconnection between the top and bottom layers, were well fabricated with a height of 135 µm and 260-µm pitch (figure 6(b)). Figure 6(c) shows the IPD embedded in the mold area under the top die. The µbump joint area between the dummy ASIC and connect die is shown in figure 6(d). The pitch of the µbump is 50 µm and it was well joined without non-wet, short or wicking phenomenon. The height of connect die is about 70 µm. The Cu stud of connect die shows a uniform height of about 5 µm. The EMC material showed a good flowability with no void between Cu studs. From this result, the height of the tall Cu pillar can be lower due to the lower thickness of connect die and Cu stud using accurate grinding technology.

Fig. 6: The cross-section SEM images of mTV1 S-Connect package.

mTV2 (3x reticle size) S-Connect package module

Figure 7 shows the X-ray image of the C4 bump joint at the corner of mTV2 S-Connect package after the flip-chip bonding process. It demonstrates a good C4 bump joint without non-wet or short.

Fig. 7: The X-ray images of C4 bump joint between mTV2 S-Connect package and package substrate.

Fig. 8: The cross-section SEM images of mTV2 S-Connect package.

We demonstrated large module mTV2 and confirmed the build quality with cross-section analysis in figure 8. Before the destructive analysis the SAT image was captured to see the alignment of bridge dies. Each section of the bridge area was polished and observed with SEM images. The connect die solder joint is solid without any void or irregular wetting and C4 bumps are also well connected to the substrate we expected. As confirmed in mTV1, at the high temperature operation in the reflow process the mTV2 module keeps a nearly flat condition. Smile and crying curve estimation is the key technique for successful module attachment.

Fig. 9: The warpage comparison on S-Connect mTVs.

The analysis of warpage behavior was conducted and confirmed that it is clearly variable depending on the size of the mTV. As shown in figure 9, the simulated warpage behavior of mTV2 is about 3.4 times and 3.7 times larger than the warpage of mTV1 in RT and HT, respectively. The real warpage behavior matched to a good alignment with simulation modeling. This result also aligns with the prediction factors of EMC and die thickness variation.

Table 4: Reliability test results of mTV2 S-Connect package.

Reliability test

Reliability testing of S-Connect mTV2 was evaluated following JEDEC standards, including moisture resistive test level 4 (MRTL4), high temperature storage (HTS), temperature cycling classification B (TCB), and unbiased highly accelerated stress testing (UHAST). It was carried out with fewer quantities than the JEDEC standard due to the limited number of samples. After completing all items of the reliability tests, there was no mechanical crack and delamination between interfaces in all mTV2 module packages. It is confirmed that the S-Connect mTV2 showed good mechanical robustness properties.

Conclusion

The bridge platform of S-Connect was successfully demonstrated from a 1x to 3x reticle-size module. It was evaluated through both the simulation modeling and actual module fabrication. It is expected that bridge technology will become a key solution for HI packing beyond the 2.5D interposer. The S-Connect platform could apply fine-pitch solder bumps and high-density signal routing for D2D interconnections since it leverages Si interposer technology. In assembly, the EMC material selection with low CTE has lower module warpage. In addition, the module warpage can be controlled by stack-up variations. The S-Connect package will continue to be developed with a larger module, more robust power delivery and fine-pitch interconnection as well. S-Connect packaging is part of the plan to launch smart HI packaging solutions with high performance and robust reliability.

Acknowledgement

The authors would like to thank JaeYoon Kim, SeungNam Son, EunYoung Lee, ChaeYun Lim, MinSu Jeong, SeHwan Hong from the Amkor Technology Korea Product development team, WonHo Choi, JinHan Kim from the Amkor Technology Korea Fab. Process team, and JiHun Lee from Amkor Technology Korea.

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