How to identify design weaknesses, automatically repair the supply noise source, analyze the impact of dynamic voltage drop and verify power and signal EM.
A presentation discussing how RedHawk enables physical design weakness identification, automatic repair the source of the supply noise, analyze impact of dynamic voltage drop on timing and jitter, verify power and signal EM, and provide a model of the chip’s PDN for system-level analysis.
To view this video tutorial, click here.
30 facilities planned, including 10/7nm processes, but trade war and economic factors could slow progress.
Applied Materials’ VP looks at what’s next for semiconductor manufacturing and the impact of variation, new materials and different architectures.
Researchers digging into ways around the von Neumann bottleneck.
iPhone X elevates niche optical technology to hot growth market. Now the question is what else it is good for?
Optimizing complex chips requires decisions about overall system architecture, and memory is a key variable.
Semiconductor devices face many hazards before and after manufacturing that can cause them to fail prematurely.
2019 will be a year of change for the semiconductor industry as new fields drive technological advancements.
Stacking die is garnering more attention, but design flows aren’t fully ready to support it.
What hoops will designers have to jump through to avoid concurrency bugs?
Maximum flexibility is no longer the reliable path to product success. While flexibility must be there for a purpose, it also can be a liability.
Why managing power is becoming more difficult, more critical, and much more expensive.
This new communications standard could transform architectural decisions across the industry, but not right away and not necessarily in obvious ways.
Accuracy is a relative term that complicates design and verification. Machine learning makes the industry face some of those realities head on.
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
Leave a Reply