Just adding more or thicker wires to a design isn’t sufficient with chiplets.
Disaggregating SoCs, coupled with the need to process more data faster, is forcing engineering teams to rethink the electronic plumbing in a system. Wires don’t shrink, and just cramming more wires or thicker wires into a package are not viable solutions. Kevin Donnelly, vice president of strategic marketing at Eliyan, talks about how to speed up data movement between chiplets with bi-directional data movement, how to minimize signal integrity issues, and what other factors need to be considered.
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