Tech Talk: 802.11ax Multi-User


Daniel Webb, staff marketing manager at Marvell, talks about the new wireless standard, what's needed to make it work, and why it's so critical in the home and office. https://youtu.be/xIG7J928XFs » read more

A Dual-Mode Error-Correcting Code Solution For 50Gbps Ethernet


The increase in bandwidth is driving more innovations in the Ethernet physical layer technology to combat numerous challenges like channel loss, inter-symbol interference and more importantly error detection and correction. It is imperative to have a mechanism in place to detect and correct errors as data is transmitted and received, while maintaining small silicon area and low power consumptio... » read more

Integrated Photonics


Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Overcoming Bandwidth Issues In Self-Driving Vehicles


Drivers are already getting used to what used to be “cool new features” that have now become “can’t live without” technologies, such as the backup camera, blind spot alert or parking assist. Each of these technologies stream information, or data, within the car, and as automotive technology evolves, more and more features will be added. But when it comes to autonomous vehicles, the am... » read more

Architecting Memory For Next-Gen Data Centers


The industry’s insatiable appetite for increased bandwidth and ever-higher transfer rates is driven by a burgeoning Internet of Things (IoT), which has ushered in a new era of pervasive connectivity and generated a tsunami of data. In this context, datacenters are currently evaluating a wide range of new memory initiatives. All seek to optimize efficiency by reducing data transport, thus sign... » read more

An Architecture Synthesis Platform For Rapidly Evolving SoC Designs


Modern System-on-Chip (SoC) architects are faced with a number of serious challenges. First, the number of Semiconductor Intellectual Property (IP) blocks in SoC designs is growing continuously and increasing design complexity. With IP design reuse becoming more common, the mixing and matching of IP components is further compounding design complexity. Second, sophisticated SoC applications are ... » read more

Anything As A Service


Everything as a service promises to simplify our lives, from cutting edge business to consumer applications. It is too early to tell, but the concept of everything moving to the cloud poses some interesting issues, from bandwidth to security. Who would have guessed that in 2015, launching a business would require virtually no physical assets? You simply turn on your computer and everything y... » read more

Exploring System Architectures For Data-Intensive Applications


The exponential growth of digital data is being driven by a number of factors, including the burgeoning Internet of Things (IoT) and an increased reliance on complex analytics extracted from extremely large data sets. Perhaps not surprisingly, IDC analysts see digital data doubling roughly every two years. This dramatic growth continues to challenge, and in some cases, even outpace industry cap... » read more

Which Memory Type Should You Use?


I continue to get besieged by statements in which memory “latency” and “bandwidth” get misused. As I mentioned in my last blog, latency is defined as how long the CPU needs to wait before the first data is available, while bandwidth is how fast additional data can be “streamed” after the first data point has arrived. Bandwidth becomes a bigger factor in performance when data is stor... » read more

The Memory And Storage Hierarchy


The memory and storage hierarchy is a useful way of thinking about computer systems, and the dizzying array of memory options available to the system designer. Many different parameters characterize the memory solution. Among them are latency (how long the CPU needs to wait before the first data is available) and bandwidth (how fast additional data can be “streamed” after the first data poi... » read more

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