Systematic Methodology To Solve Reset Challenges In Automotive SoCs

A hierarchical solution with distinct accuracy, capacity and reporting advantages over previous methodologies.


Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. The conventional clock domain and CDC verification methodologies cannot identify such critical bugs. In this paper, we present a systematic methodology to identify and solve critical RDC bugs in automotive SoCs.

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