FPGA Design Tradeoffs Getting Tougher


FPGAs are getting larger, more complex, and significantly harder to verify and debug. In the past, FPGAs were considered a relatively quick and simple way to get to market before committing to the cost and time of developing an ASIC. But today, both FPGAs and eFPGAs are being used in the most demanding applications, including cloud computing, AI, machine learning, and deep learning. In some ... » read more

Enabling Faster Design, Verification and Debug of FPGAs


Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today’s FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verificatio... » read more

Debug Tools Are Improving


Semiconductor Engineering sat down to discuss debugging complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for Cadence; Mark Olen, senior product marketing manager for Mentor, a Siemens Business; and Dominik Strasser, vice president of engineering for OneSpin Solutions. Part one can be found here. Part two... » read more

How To Optimize Verification


The rate of improvement in verification tools and methodologies has been nothing short of staggering, but that has created new kinds of problems for verification teams. Over the past 20 years, verification has transformed from a single language (Verilog) and tool (simulator) to utilizing many languages (testbench languages, assertion languages, coverage languages, constraint languages), many... » read more

Breaking Down The Debug Process


Semiconductor Engineering sat down to discuss debugging complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for Cadence; Mark Olen, senior product marketing manager for Mentor, a Siemens Business; and Dominik Strasser, vice president of engineering for OneSpin Solutions. Part one can be found here. What fol... » read more

Debugging Complex SoCs


Semiconductor Engineering sat down to discuss the debugging of complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for Cadence; Mark Olen, senior product marketing manager for Mentor, a Siemens Business; and Dominik Strasser, vice president of engineering for OneSpin Solutions. What follows are excerpts of ... » read more

Improving Simulation Throughput Using The Xcelium Parallel Logic Simulator


Simulators have been around for a long time. First, there were interpreters in the ‘80s and ‘90s, and despite being relatively slow, they were a big step up from fabricating the design and hoping it worked. However, as designs continued to increase in size, the interpreters could not keep up with simulation needs, and innovation was required for simulators to keep pace with new technology. ... » read more

Speed Up P2P Resistance Debugging With Selective Highlighting


Point-to-point (P2P) resistance simulation calculates the effective parasitic resistance from one or more specified points (sources) to another set of points (sinks) on an integrated circuit (IC) layout. The results of these simulations are a key component in the verification of the robustness and reliability of IC layout interconnect—designers must have this information to accurately perform... » read more

ATE Lab To Fab


Shu Li, business development manager at Advantest, zeroes in on the communication gap between engineers on the design side and the manufacturing/test side, why it exists, and what needs to be done to bridge that gap in order to speed up and improve test quality. https://youtu.be/Nd-5_twbJBw     See other tech talk videos here » read more

Blog Review: April 17


In a video, Mentor's Colin Walls digs into power management in embedded software with a particular look at the Power Pyramid model. Synopsys' Taylor Armerding checks out the state of application security at this year's RSA and finds that while organizations are paying attention to security through training and dedicated teams, roadblocks still remain. Cadence's Paul McLellan considers how... » read more

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