tag: 3D-IC

Reducing Post-Placement Leakage With Stress-Enhanced Fill Cells
By Valeriy Sukharev - 17 Mar, 2016 - Comments: 0

By Valeriy Sukharev, Jun-Ho Choy, Armen Kteyan and Henrik Hovsepyan As downward scaling of transistors continues, optimizing power consumption for mobile devices is a major concern. Power consumption consists of two components: dynamic and static. Dynamic (active) power is used while the chip is performing various functions, while static (leakage) power is consumed by leakage current (Figure... » read more

Inside Advanced Packaging
By Mark LaPedus - 18 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advanced IC-packaging, the OSAT industry, China and other topics with Ron Huemoeller, vice president of worldwide R&D at Amkor. What follows are excerpts of that conversation. SE: Where are we in advanced IC-packaging today? Huemoeller: We’ve hit the inflection point. Now we are coming to the other side of it. Regarding this need to int... » read more

Will 3D-IC Work?
By Ed Sperling - 11 Feb, 2016 - Comments: 3

Advanced packaging is becoming real on every level, from fan-outs to advanced fan-outs, 2.5D, and 3D-ICs for memory. But just how far 3D and monolithic 3D will go isn't clear at this point. The reason is almost entirely due to heat. In a speech at SEMI's Integrated Strategy Symposium in January, Babek Sabi, Intel corporate VP and director of assembly and test technology development, warned t... » read more

Thermal Damage To Chips Widens
By Ed Sperling - 11 Feb, 2016 - Comments: 1

Heat is becoming a much bigger problem for semiconductor and system design, fueled by higher density and the increasing use of complex chips in markets such as automotive, where reliability is measured in decade-long increments. In the past, heat typically was handled by mechanical engineers, who figured out where to put heat sinks, fans, or holes to funnel heat out of a chassis. But as more... » read more

Fallout From Scaling
By Ed Sperling - 03 Feb, 2016 - Comments: 0

By Ed Sperling & Ann Steffora Mutschler Semiconductor scaling is becoming much more difficult and expensive at each new node, creating sharp divisions about what path to take next for which markets and applications. What used to be confined to one or two clear choices is now turning into a menu of items and possibilities, often with no clear guarantees for a successful outcome. Views ... » read more

Device Adequateness
By Brian Bailey - 28 Jan, 2016 - Comments: 1

There is a growing chorus of people who are saying that 2016 will be, quite frankly, a boring technology year. They talk about no new or exciting products coming along. They talk about a lack of imagination, a lack of new product categories and quite a few failed categories from the past couple of years, such as wearables. It all comes down to the fact that products have not managed to make us ... » read more

Predictions For 2016: Tools and Flows
By Brian Bailey - 28 Jan, 2016 - Comments: 0

Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Predictions For 2016: Semiconductors, Manufacturing And Design
By Brian Bailey - 21 Jan, 2016 - Comments: 0

Seventeen companies sent in their predictions for this year with some of them sending predictions from several people. This is in addition to the CEO predictions that were recently published. That is a fine crop of views for the coming year, especially since they know that they will be held accountable for their views and this year, just like the last, they will have to answer for them. We beli... » read more

Will 5nm Happen?
By Mark LaPedus - 20 Jan, 2016 - Comments: 7

Chipmakers are ramping up their 16/14nm finFET processes, with 10nm finFETs expected to ship sometime in late 2016 or early 2017. So what’s next? The foundries can see a path to extend the finFET transistor to 7nm, but the next node, 5nm, is far from certain and may never happen. Indeed, there are several technical and economic challenges at 5nm. And even if 5nm happens, only a few compani... » read more

Advanced Packaging Is Real. Now What?
By Ed Sperling - 14 Jan, 2016 - Comments: 0

For the past five years, it's been clear that 2.5D, fan-outs and other forms of system-in-package were on the horizon. Exactly when they would arrive no one knew. The most common prediction was that the timing would depend on when one of the big chipmakers decided to go down that route. The theory was that the remainder of the industry would follow, ecosystem issues would be sorted out—partic... » read more

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