An Insider’s Guide To Planar And 3D DRAM


Semiconductor Engineering sat down to talk about planar DRAMs, 3D DRAMs, scaling and systems design with Charles Slayman, technical leader of engineering at network equipment giant Cisco Systems. What follows are excerpts of that conversation. SE: What types of DRAM do network equipment OEMs look at or buy these days? Slayman: When we look at DRAM, we look at it for networking applicatio... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions Rambus expanded the scope of its Cryptography Research Division with the acquisition of UK-based Smart Card Software. The £64.7M ($91.84 million) deal comprises advanced mobile payment platform developer Bell ID as well as Ecebs, a supplier of smart ticketing systems to the UK transport markets. Tools & IP Mentor Graphics uncorked its Embedded Multicore ... » read more

Industry Road Map Under Construction


While most engineers think in terms of PPA—the classic power, performance and area tradeoffs—their bosses tend to see the world in terms of risk vs. opportunity. Until 22nm, these two objectives moved forward at roughly the same pace, despite the growing technical challenges of fitting more functionality into an SoC. Much has changed since then, and even more will change over the next f... » read more

Thinking Outside The Chip


Intel will begin adding 2.5D and 3D packaging into its processors, following the lead set by IBM and AMD in recognizing that new packaging approaches are essential for improving performance and lowering power. This shift won't derail the semiconductor industry's efforts to the reach future process nodes or continually shrink features, but it does add context for other factors that in... » read more

Reliability Adds Risk Over Time


Being able to connect devices to other devices has a long list of benefits, many of them related to the digitization of the analog or physical world. That includes all the benefits of being able to quantify, process and analyze information to to relay it in real time all over the globe. This is what's at the heart of the Internet of Things/Internet of Everything revolution. It's also at leas... » read more

The Week In Review: Manufacturing


South Korea’s SK Hynix led the initial charge in the development of High Bandwidth Memory (HBM), a 3D DRAM technology based on a memory stack and through-silicon vias (TSVs). SK Hynix has been shipping HBM parts in the market. Now, SK Hynix and Samsung are readying the next version of the technology, dubbed High Bandwidth Memory 2 or HMB2, according to a report from The Electronic Times of So... » read more

Manufacturing Bits: Nov. 17


Speedy nano-scale subs For years, researchers have been developing nano-scale submarines. In theory, nano-subs could be used in various applications. For example, they could navigate inside the human body and transport medicine to various organs. The problem? Most nano-subs use or generate toxic chemicals, according to researchers from Rice University. Seeking to solve the problem, Rice ... » read more

The Week In Review: Manufacturing


China is investing billions of dollars in the IC industry and equipment sectors. The nation is also in the midst of an acquisition and an investment spree, especially in IC packaging. For example, Jiangsu Changjiang Electronics Technology (JCET), a Chinese OSAT, shook up the landscape by recently announcing a deal to acquire STATS ChipPAC for $780 million. The deal was completed in August of 20... » read more

The Week In Review: Manufacturing


Looking to propel the next wave of OLED displays, Applied Materials has rolled out two new systems. The tools enable the volume production of OLED displays for both mobile products and TVs. In addition, Applied Materials has shipped an Applied TopMet roll-to-roll metal deposition system to Jindal Poly Films, a leader in PET and BOPP films for flexible packaging and labeling applications. In... » read more

Security In 2.5D


The long-anticipated move to 2.5D and fan-outs is raising some familiar questions about security. Will multiple chips combined in an advanced package be as secure as SoCs where everything is integrated on the same die? The answer isn't a simple yes or no. Put in perspective, all chips are vulnerable to [getkc id="253" kc_name="side channel attacks"], hacking of memory—a risk that increases... » read more

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