Software-Defined Vehicles Ready To Roll

By Ann Mutschler - 05 Feb, 2024 - Comments: 0

Software-defined vehicles are driving a swell of activity across the automotive ecosystem, including new methodologies and technology approaches that could significantly reduce costs and shorten time to market for advanced features. The SDV approach encompasses more than a single concept. It helps to think of it more as a modeling approach that connects EVs, driver assistance technology, and... » read more

Chip Industry Week In Review

By The SE Staff - 02 Feb, 2024 - Comments: 0

By Jesse Allen, Gregory Haley, and Liz Allan. Cadence introduced an AI-based thermal stress and analysis platform aimed at 2.5D and 3D-ICs, and cooling for PCBs and electronic assemblies. The company also debuted a HW/SW accelerated digital twin solution for multi-physics system design and analysis, combining GPU-resident computational fluid dynamics (CFD) solvers with dedicated GPU hardwar... » read more

Preparing For An AI-Driven Future In Chips

By Ed Sperling - 01 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the impact of AI on semiconductor architectures, tools, and security, with Michael Kurniawan, business strategy manager at Accenture; Kaushal Vora, senior director and head of business acceleration and ecosystem at Renesas Electronics; Paul Karazuba, vice president of marketing at Expedera; and Chowdary Yanamadala, technology s... » read more

Blog Review: Jan. 31

By Jesse Allen - 31 Jan, 2024 - Comments: 0

Synopsys' William Ruby argues for a comprehensive energy-efficient design methodology for automotive ICs as today's vehicles demand ever more computing power to support electrification, communication, and processing of massive amounts of data. Cadence's Mellacheruvu Srikanth finds that verifying all the new features and enhancements across several generations of PCIe while maintaining backwa... » read more

Blog Review: Jan. 24

By Jesse Allen - 24 Jan, 2024 - Comments: 0

Siemens' John McMillan finds that while 3D-IC capabilities are ready for mainstream, mass adoption success depends on how easily, effectively, and efficiently a solution can be delivered and points to five workflow adoption focus areas. Cadence's Andre Baguenie shows how to easily convert a logic signal to an electrical value using Verilog-AMS and the transition filter. Synopsys' Chris Cl... » read more

Blog Review: Jan. 17

By Jesse Allen - 17 Jan, 2024 - Comments: 0

Cadence's Rajneesh Chauhan introduces the Back-Invalidate feature in Compute Express Link (CXL) 3.0 and how it contributes to the efficient functioning of modern data center architectures by upholding cache coherence across multiple hosts and devices. Synopsys' Brett Murdock and Dana Neustadter point out the importance of protecting against DRAM attacks such as Rowhammer, RAMbleed, and cold-... » read more

SoC Telemetry & Performance Analysis Using Statistical Profiling Extension

By Brian Jeff - 11 Jan, 2024 - Comments: 0

The Arm Statistical Profiling Extension (SPE) is an architectural feature designed for enhanced instruction execution profiling within Arm CPUs. This feature has been available since the introduction of the Neoverse N1 CPU platform in 2019, along with performance monitor units (PMUs) generally available in Arm CPUs. An important step in extracting value from capabilities like SPE and PMUs is th... » read more

See The Future of IoT: Planning For Success With Smart Vision

By Arm - 11 Jan, 2024 - Comments: 0

Computer vision devices that can ‘see’ and act on visual information are bringing new efficiencies and functionalities to IoT. But with new opportunities come complexities. The specific features and functionality of smart vision use cases vary widely. Creating a system that catches defects on an assembly line requires different imaging, machine learning, and workloads compared to one ... » read more

Blog Review: Jan. 3

By Jesse Allen - 03 Jan, 2024 - Comments: 0

Siemens' Stephen Ferguson looks at the history of computer aided engineering through the lens of how humans interact with computers, with each development enabling a step change in engineering productivity, and the new era on the horizon. Cadence's Krunal Patel finds that the security of data transmission can be improved by integrating Ethernet with Internet Protocol Security (IPSec), which ... » read more

Dramatic Changes Ahead For Chips And Systems

By Karen Heyman - 21 Dec, 2023 - Comments: 0

Early this year, most people had never heard of generative AI. Now the entire world is racing to capitalize on it, and that's just the beginning. New markets, such as spatial computing, quantum computing, 6G, smart infrastructure, sustainability, and many more are accelerating the need to process more data faster, more efficiently, and with much more domain specificity. Compared to the days ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.