tag: Accellera

Reflections On 2015
By Brian Bailey - 22 Dec, 2015 - Comments: 0

It is easy to make predictions, but few people can make them with any degree of accuracy. Most of the time, those predictions are forgotten by the end of the year and there is no one to do a tally of who holds more credibility for next year. Not so with SemiEngineering. We like to hold people's feet to the fire, but while the Pants-On-Fire meter may be applicable to politicians, we like to thin... » read more

One Flow To Rule Them All
By Brian Bailey - 12 Nov, 2015 - Comments: 0

The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

Say Hi To Hybrid
By Doug Amos - 29 Oct, 2015 - Comments: 0

It has been proposed for some time that virtual platforms could be linked to emulation hardware in order to co-verify the software and hardware components of an SoC. However, that proposal now has evolved into hybrid emulation, a practical solution to allow pre-silicon verification and validation of today’s complex SoC designs. First-rate work by the standards body Accellera and the Open ... » read more

Analog Meets Power In Standards Groups
By Ann Mutschler - 15 Oct, 2015 - Comments: 4

While the topic of language [getkc id="13" comment="Standards"] might be cringe-worthy for some, there is some noteworthy work underway in this area—particularly where power and analog meet paths. There are four main standards here: Verilog-A and Verilog-AMS VHDL-AMS SystemC-AMS SystemVerilog-AMS SystemVerilog-AMS is the newcomer, and while the standard won't be available for ... » read more

Power, Standards And The IoT
By Ed Sperling - 15 Oct, 2015 - Comments: 0

Semiconductor Engineering sat down to discuss power, standards and the IoT with Jerry Frenkil, director of open standards at [getentity id="22055" comment="Si2"]; Frank Schirrmeister, group director of product marketing of the System Development Suite at [getentity id="22032" e_name="Cadence"]; Randy Smith, vice president of marketing at [getentity id="22605" e_name="Sonics"]; and Vojin Zivojno... » read more

Abstraction: Necessary But Evil
By Brian Bailey - 14 Oct, 2015 - Comments: 1

Abstraction allows aspects of a design to be described in an executable form much earlier in the flow. But some abstractions are breaking down, and an increasing amount of lower-level information has to be brought upstream in order to provide estimates that are close enough to reality so informed decisions can be made. The value of abstractions in design cannot be overstated. High levels of ... » read more

Blog Review: Sept. 30
By Jesse Allen - 30 Sep, 2015 - Comments: 0

In an increasingly networked world, NXP's Lars Reger advocates for a change of perspective: one which places data protection and the security of end customers and users at the heart. Differential power analysis has been on the mind of Rambus' Aharon Etengoff recently as increasing numbers of SIM cards are being cracked, plus some counter measures that can be used. Even wondered about the ... » read more

ESL: 20 Years Old, 10 To Go
By Brian Bailey - 23 Sep, 2015 - Comments: 2

It is a common perception that the rate of technology adoption accelerates. In 1873, the telephone was invented and, after 46 years, it had been adopted by one-quarter of the U.S. population. Television, invented in 1926 took 26 years. The PC in 1975 took just 16 years. It took only 7 years after the introduction of the Internet in 1991 before it was seeing significant levels of adoption. So... » read more

Blog Review: Sept. 9
By Ed Sperling - 09 Sep, 2015 - Comments: 0

Doulos' John Aynsley explains in a guest blog for Aldec why FPGA designers need to know SystemVerilog and UVM. Might be time to increase the coffee budget. Speaking of verification, Cadence's Frank Schirrmeister notes that his company is joining forces with Mentor Graphics and Breker for a contribution to the Accellera Portable Stimulus Working Group. This is potentially a big deal in veri... » read more

The Week In Review: Design/IoT
By Jesse Allen - 28 Aug, 2015 - Comments: 0

M&A Tessera boosted its 2.5D and 3D-IC capabilities with the acquisition of Ziptronix. The $39 million cash purchase adds a low-temperature wafer bonding technology platform, which has been licensed to Sony for volume production of CMOS image sensors. Numbers Semico Research forecasts that the SoC market will approach $200 billion by 2019. According to its analysis, average die are... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy