New Uses For Assertions


Assertions have been a staple in formal verification for years. Now they are being examined to see what else they can be used for, and the list is growing. Traditionally, design and verification engineers have used assertions in specific ways. First, there are assertions for formal verification, which are used by designers to show when something is wrong. Those assertions help to pinpoint wh... » read more

DDR PHY Training


Brett Murdock, senior product marketing manager at Synopsys, explains how to train the DRAM physical layer using firmware, why that is so important for flexibility, and what kinds of issues engineers encounter when using this approach. » read more

Medical, Industrial & Aerospace IC Design Changes


Medical, industrial and aerospace chips are becoming much more complex as more intelligence is added into these devices, forcing design teams to begin leveraging tools and methodologies that typically have been used only at the leading-edge nodes for commercial applications. But as with automotive, the needs of these systems are changing quickly. In addition to strict quality, safety and sec... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys revealed DSO.ai (Design Space Optimization AI), an autonomous AI application that searches for optimization targets in very large solution spaces of chip design, inspired by the process of DeepMind's game-playing AlphaZero. DSO.ai engines ingest large data streams generated by chip design tools and use them to explore search spaces, observing how a design evolves over t... » read more

EDA In The Cloud


Michael White, director of product marketing for Calibre physical verification at Mentor, a Siemens Business, looks at the growing compute requirements at 7, 5 and 3nm, why the cloud looks increasingly attractive from a security and capacity standpoint, and how the cloud as well as new lithography will affect the cost and complexity of developing new chips. » read more

Week In Review: Design, Low Power


Processors Arm rolled out a micro neural processing unit that, when combined with its newest microcontroller, can increase machine learning performance by up to 480 times. The company is aiming the MCU and co-processor across a wide swath of applications. Worth noting is that Arm calls its Cortex-M55 an AI-capable processor, rather than a microcontroller, as the lines between the various proce... » read more

Week In Review: Design, Low Power


Presto Engineering, an outsourced operations provider to semiconductor and IoT device manufacturers, acquired the DELTA Microelectronics business unit of FORCE Technology. The acquisition adds DELTA's ASIC design and manufacturing to its portfolio. The two companies will retain a strong relationship: FORCE Technology has become a shareholder of Presto Engineering and Juan Farré, FORCE’s CTO,... » read more

Week In Review: Design, Low Power


Xilinx filed a patent infringement countersuit against Analog Devices, alleging infringement of eight U.S. patents including technologies involving serializers/deserializers (SerDes), high-speed ADCs and DACs, as well as mixed-signal devices targeting 5G and other markets. The counterclaims are in response to Analog Devices' December lawsuit alleging unauthorized use by Xilinx of eight ADI pate... » read more

Dealing With ECOs In Complex Designs


Namsuk Oh, R&D principal engineer at Synopsys, talks about the impact of more corners and engineering change orders, how that needs to be addressed in the flow to close timing, and how dependencies can complicate any changes that are required. » read more

Priorities Shift In IC Design


The rush to the edge and new applications around AI are causing a shift in design strategies toward the highest performance per watt, rather than the highest performance or lowest power. This may sound like hair-splitting, but it has set a scramble in motion around how to process more data more quickly without just relying on faster processors and accelerators. Several factors are driving th... » read more

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