tag: DRAM

Rightsizing Challenges Grow
By Ed Sperling - 20 Apr, 2016 - Comments: 0

Rightsizing chip architectures is getting much more complicated. There are more options to choose from, more potential bottlenecks, and many more choices about what process to use at what process node and for which markets and price points. Rightsizing is a way of targeting chips to specific application needs, supplying sufficient performance while minimizing power and cost. It has been a to... » read more

Power/Performance Bits: April 19
By Jesse Allen - 19 Apr, 2016 - Comments: 0

Ferroelectric non-volatile memory Scientists from the Moscow Institute of Physics and Technology (MIPT), the University of Nebraska, and the University of Lausanne in Switzerland succeeded in growing ultra-thin (2.5-nanometer) ferroelectric films based on hafnium oxide that could potentially be used to develop non-volatile memory elements called ferroelectric tunnel junctions. The film was g... » read more

It’s All About DRAM
By Ed Sperling - 14 Apr, 2016 - Comments: 4

For decades, the starting point for compute architectures was the processor. In the future, it likely will be the DRAM architecture. Dynamic random access memory always has played a big role in computing. Since IBM's Robert Dennard invented DRAM back in 1966, it has become the gold standard for off-chip memory. It's fast, cheap, reliable, and at least until about 20nm, it has scaled quite n... » read more

Using Multi-Channel Connections for Optimized LPDDR4 Power & Performance
By Marc Greenberg - 14 Apr, 2016 - Comments: 0

LPDDR4, the latest double data rate synchronous DRAM for mobile applications, includes a number of features that enable SoC design teams to reduce power consumption of discrete DRAM in mobile devices. Desktop devices like PCs and servers commonly utilize DDR devices mounted on dual inline memory modules (DIMM) hosted on 64-bit wide buses. This board-level solution allows field-upgradeable DRAM ... » read more

Many Paths To Hafnium Oxide
By Katherine Derbyshire - 31 Mar, 2016 - Comments: 0

Equipment and materials suppliers often talk about the fragmentation of integrated circuit processing. While the number of manufacturers has gone down, the diversity of the underlying semiconductor market has increased. Low-power processors for mobile devices, non-volatile memory for solid state disks, and dedicated graphics processors all have different requirements from the traditional ind... » read more

How Many Cores? (Part 2)
By Ed Sperling - 21 Mar, 2016 - Comments: 1

New chip architectures and new packaging options—including fan-outs and 2.5D—are changing basic design considerations for how many cores are needed, what they are used for, and how to solve some increasingly troublesome bottlenecks. As reported in part one, just adding more cores doesn't necessarily improve performance, and adding the wrong size or kinds of cores wastes power. That has s... » read more

Running Out Of Energy?
By Ann Mutschler - 16 Mar, 2016 - Comments: 1

The anticipated and growing energy requirements for future computing needs will hit a wall in the next 24 years if the current trajectory is correct. At that point, the world will not produce enough energy for all of the devices that are expected to be drawing power. A report issued by the Semiconductor Industry Association and Semiconductor Research Corp., bases its conclusions on system-le... » read more

New Memory Approaches And Issues
By Ed Sperling - 14 Mar, 2016 - Comments: 1

New memory types and approaches are being developed and tested as DRAM and Moore's Law both run out of steam, adding greatly to the confusion of what comes next and how that will affect chip designs. What fits where in the memory hierarchy is becoming less clear as the semiconductor industry grapples with these changes. New architectures, such as [getkc id="202" kc_name="fan-outs"] and [getk... » read more

Optimizing DDR Memory Subsystem Efficiency
By Synopsys - 24 Feb, 2016 - Comments: 0

The memory subsystem sits at the core of a System-on-Chip (SoC) platform and can make all the difference between a well-designed system meeting its performance requirements and a system that delivers poor performance, or even fails to operate correctly. State-of-the-art DDR memory controllers use advanced arbitration and scheduling policies to optimize DDR memory efficiency. At the same time, t... » read more

What’s Next For DRAM?
By Mark LaPedus - 24 Feb, 2016 - Comments: 2

The DRAM business has always been challenging. Over the years, DRAM suppliers have experienced a number of boom and bust cycles in a competitive landscape. But now, the industry faces a cloudy, if not an uncertain, future. On one front, for example, [getkc id="93" kc_name="DRAM"] vendors face a downturn amid a capacity glut and falling product prices in 2016. But despite the business chal... » read more

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