tag: FPGA

FPGA Fault Injection Attacks (ASU, KIT)
By Technical Paper Link - 29 Oct, 2024 - Comments: 0

A new technical paper titled "Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics" was published by researchers at Arizona State University and Karlsruhe Institute of Technology (KIT). Abstract "FPGAs are now ubiquitous in cloud computing infrastructures and reconfigurable system-on-chip, particularly for AI acceleration. Major cloud service providers s... » read more

Post-Quantum Computing Threatens Fundamental Transport Protocols
By Karen Heyman - 01 Aug, 2024 - Comments: 0

The Transport Level Security (TLS) protocol is one of the few rock-steady spots in the rapidly changing computing industry, but that's about to change as quantum computers threaten traditional encryption schemes. Because TLS is fundamental to network communications, including allowing Internet of Things (IoT) devices to function properly, researchers already are exploring both hardware and s... » read more

On-Chip Communication For Programmable Accelerators In Heterogeneous SoCs (Columbia, IBM)
By Technical Paper Link - 10 Jul, 2024 - Comments: 0

A technical paper titled “Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures” was published by researchers at Columbia University and IBM Thomas J. Watson Research Center. Abstract: "We present several enhancements to the open-source ESP platform to support flexible and efficient on-chip communication for programmable accelerators in het... » read more

Lower Energy, High Performance LLM on FPGA Without Matrix Multiplication
By Technical Paper Link - 27 Jun, 2024 - Comments: 0

A new technical paper titled "Scalable MatMul-free Language Modeling" was published by UC Santa Cruz, Soochow University, UC Davis, and LuxiTech. Abstract "Matrix multiplication (MatMul) typically dominates the overall computational cost of large language models (LLMs). This cost only grows as LLMs scale to larger embedding dimensions and context lengths. In this work, we show that MatMul... » read more

Probing Attacks Against Chiplets
By Technical Paper Link - 11 Jun, 2024 - Comments: 0

A technical paper titled “Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques” was published by researchers at University of Massachusetts and Worcester Polytechnic Institute. Abstract: "Driven by a need for ever increasing chip performance and inclusion of innovative features, a growing number of semiconductor companies are opting for all-inclusive System-... » read more

Secure Your SoC From Side Channel Attacks With Adaptable Security
By Jayson Bethurem - 06 Jun, 2024 - Comments: 0

Many SoC and ASIC manufacturers rely heavily on cryptographic solutions to safeguard sensitive IP and data transmission within their devices. In a dynamic landscape where threats from attackers continue to evolve, encryption algorithms play a crucial role in fortifying defenses. Hackers today are leveraging advanced physical tactics that extend beyond traditional data interception, posing signi... » read more

Cut Power+Cost 5–10x: Integrate FPGA In Your SoC
By Flex Logix - 08 May, 2024 - Comments: 0

You can integrate an FPGA in an SoC at full speed and flexibility. Until EFLX eFPGA, it was not possible to integrate full-speed, high-density FPGA in an SoC. Now you can. Click here to read more. » read more

Accelerate Complex Algorithms With Adaptable Signal Processing Solutions
By Jayson Bethurem - 10 Mar, 2024 - Comments: 0

Technology is continuously advancing and exponentially increasing the amount of data produced. Data comes from a multitude of sources and formats, requiring systems to process different algorithms. Each of these algorithms present their own challenges including low-latency and deterministic processing to keep up with incoming data rates and rapid response time. Considering that many of these se... » read more

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat Politècnica de Catalunya. Abstract: "Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidate... » read more

Expand Your Semiconductor’s Market With Programmable Data Planes
By Jayson Bethurem - 01 Feb, 2024 - Comments: 1

In nearly every communication interface today, many challenges exist. Not only must networks manage high volumes of data traffic, they must also be highly aware of malicious data intrusions. With increasing data moving though these networks, combined with demand for faster response times and lower latency, high performance packet processors came into existence as these were the only mechanisms ... » read more

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