Promises And Pitfalls Of SoC Restructuring

By Ed Sperling - 12 Jun, 2024 - Comments: 0

As chips become more complex and increasingly heterogeneous, it's becoming more difficult to keep track of different methodologies, tools, and blend data from different sources to create a chip. Tim Schneider, staff application engineer at Arteris, explains why IP-XACT has become so critical, why it took so long to gain a solid foothold in chip design, and how the new IP-XACT standard interface... » read more

AI Accelerated Migration Of Existing Designs To New Processors

By Rob van Blommestein - 30 May, 2024 - Comments: 0

In this fast-paced digital age where speed, performance, and time-to-market are king, chip designers are under pressure to deliver high-performance computing that doesn’t compromise power efficiency. The constant demand for instantaneous data processing and sharing is pushing the boundaries of innovation in chip design. With this context, we revisit and revamp the insights from the Synopsys U... » read more

Maximizing Efficiency And Productivity: The Benefits Of Shift Left Verification For IP Designers

By Terry Meeks - 29 Feb, 2024 - Comments: 0

Intellectual property (IP) designers play a crucial role by creating reusable components that form the building blocks of larger integrated circuit (IC) designs. These components, whether developed in-house or acquired from specialized IP design companies, are essential for providing core functionality such as memory and standard libraries. However, designing and verifying IP is a complex and d... » read more

Preparing For An AI-Driven Future In Chips

By Ed Sperling - 01 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the impact of AI on semiconductor architectures, tools, and security, with Michael Kurniawan, business strategy manager at Accenture; Kaushal Vora, senior director and head of business acceleration and ecosystem at Renesas Electronics; Paul Karazuba, vice president of marketing at Expedera; and Chowdary Yanamadala, technology s... » read more

Getting Optimal PPA For HPC & AI Applications With Foundation IP

By Andrew Appleby - 11 Jan, 2024 - Comments: 0

By Andrew Appleby, Xiaorui Hu, and Bhavana Chaurasia The demand for application-specific system-on-chips (SoCs) for compute applications is ever-increasing. Today, the diversity of requirements means there is a need for a rich set of compute solutions in a wide range of process technologies. The resulting products may have very different but demanding power, performance, and area (PPA) requi... » read more

EDA Revenue Up Again

By Ed Sperling - 17 Oct, 2023 - Comments: 0

The EDA industry reached $3.963 billion in revenue in Q2, boosted by a 17.6% increase in computer-aided engineering and a 17.2% increase in IP physical design and verification, according to a just-released ESD Alliance Electronic Market Data report. The overall growth was offset by an accounting change in the IP business, which resulted in a 11.6% decline to $1.255 billion, as well as some w... » read more

Importance Of Certifications In Automotive IP

By Pawini Mahajan - 10 Oct, 2023 - Comments: 0

The automotive industry is renowned for its unwavering commitment to enforcing strict standards for enabling safety, quality, reliability, and security. However, upholding stringent measures to ensure vehicle safety and reliability has led to the need for predictive maintenance i.e., using advanced monitoring and analytical techniques as a part of Silicon Lifecycle Management (SLM) to anticipat... » read more

Securing Automotive Ethernet With MACsec Silicon IP

By Rambus - 04 Oct, 2023 - Comments: 0

In today’s cars, the Ethernet standard is the go-to solution for connecting zonal gateways to the central compute units that handle ADAS functionality. However, in-vehicle networks are vulnerable to a number of security threats, including eavesdropping, denial-of-service attacks, man-in-the middle attacks, and unauthorized access. This white paper explores how MACsec provides an effective sol... » read more

Why Chiplets Don’t Work For All Designs

By Ed Sperling - 20 Sep, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

Quantum Plus AI Widens Cyberattack Threat Concerns

By John Koon - 18 Sep, 2023 - Comments: 1

Quantum computing promises revolutionary changes to the computing paradigm that the semiconductor industry has operated under for decades, but it also raises the prospect of widespread cybersecurity threats. Quantum computing cyberattacks will occur millions of times faster than any assault conventional computing can muster. And while quantum computing is in an early stage of development, ex... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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