tag: MIT

Energy of Computing As A Key Design Aspect (SLAC/Stanford, MIT)
By Technical Paper Link - 08 Nov, 2022 - Comments: 0

A technical paper titled "Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications" was published by researchers at SLAC/Stanford University and MIT. Abstract: "We examine the computational energy requirements of different systems driven by the geometrical scaling law, and increasing use of Artificial Intelligence or Ma... » read more

Research Bits: Nov. 7
By Jesse Allen - 07 Nov, 2022 - Comments: 0

ADC side-channel attacks Researchers at MIT propose two ways to protect analog-to-digital converters (ADCs) from power and electromagnetic side-channel attacks. The researchers first investigated the side-channel attacks that could be used against ADCs. Power attacks usually involve an attacker soldering a resistor onto the device’s circuit board to measure its power usage. An electromagn... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 04 Nov, 2022 - Comments: 0

Nikkei Asia reports the U.S. is urging allies, including Japan, to restrict exports of advanced semiconductors and related technology to China. The U.S. holds 12% of the global semiconductor market, Japan has a 15% share, while Taiwan and South Korea each have about a 20% share. Some U.S. companies have called for other countries to adopt U.S.-style export curbs, arguing it is unfair for only A... » read more

Chip Industry’s Technical Paper Roundup: Nov. 1
By Linda Christensen - 01 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=61 /] » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 28 Oct, 2022 - Comments: 0

This week saw more fallout from U.S. export controls: SK hynix may consider selling its memory chip production facilities in China if recently imposed controls make it too difficult to continue operations there, according to Nikkei Asia. "As a contingency plan, we are considering selling the fab, selling the equipment or transferring the equipment to South Korea," said Kevin Noh, SK hynix ... » read more

Using Silicon Photonics To Reduce Latency On Edge Devices
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Delocalized photonic deep learning on the internet’s edge" was published by researchers at MIT and Nokia Corporation. “Every time you want to run a neural network, you have to run the program, and how fast you can run the program depends on how fast you can pipe the program in from memory. Our pipe is massive — it corresponds to sending a full feature-leng... » read more

Bottoms Up: Arranging Nanoscale Particles On A Silicon Chip (Or Other Materials) Without Damage
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new research paper titled "Nanoparticle contact printing with interfacial engineering for deterministic integration into functional structures" was just published by researchers at MIT. “This approach allows you, through engineering of forces, to place the nanoparticles, despite their very small size, in deterministic arrangements with single-particle resolution and on diverse surfaces, ... » read more

New Class of Electrically Driven Optical Nonvolatile Memory
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Electrical Programmable Multi-Level Non-volatile Photonic Random-Access Memory" was published by researchers at George Washington University, Optelligence, MIT, and the University of Central Florida. Researchers demonstrate "a multi-state electrically-programmed low-loss non-volatile photonic memory based on a broadband transparent phase change material (Ge2Sb2S... » read more

Chip Industry’s Technical Paper Roundup: Oct 18
By Linda Christensen - 18 Oct, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Research Bits: Oct. 18
By Jesse Allen - 18 Oct, 2022 - Comments: 0

Modular AI chip Engineers at the Massachusetts Institute of Technology (MIT), Harvard University, Stanford University, Lawrence Berkeley National Laboratory, Korea Institute of Science and Technology, and Tsinghua University created a modular approach to building stackable, reconfigurable AI chips. The design comprises alternating layers of sensing and processing elements, along with LEDs t... » read more

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