tag: memory

Thanks For The Memories!
By Steve Roddy - 15 Feb, 2024 - Comments: 0

“I want to maximize the MAC count in my AI/ML accelerator block because the TOPs rating is what sells, but I need to cut back on memory to save cost,” said no successful chip designer, ever. Emphasis on “successful” in the above quote. It’s not a purely hypothetical quotation. We’ve heard it many times. Chip architects — or their marketing teams — try to squeeze as much brag-... » read more

Memory’s Future Hinges On Reliability
By Karen Heyman - 14 Feb, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the impact of power and heat on off-chip memory, and what can be done to optimize performance, with Frank Ferro, group director, product management at Cadence; Steven Woo, fellow and distinguished inventor at Rambus; Jongsin Yun, memory technologist at Siemens EDA; Randy White, memory solutions program manager at Keysight; a... » read more

Research Bits: Feb. 13
By Jesse Allen - 13 Feb, 2024 - Comments: 0

Fast phase-change memory Researchers from Stanford University, TSMC, National Institute of Standards and Technology (NIST), and University of Maryland developed a new phase-change memory for future AI and data-centric systems. It is based on GST467, an alloy of four parts germanium, six parts antimony, and seven parts tellurium, which is sandwiched between several other nanometer-thin material... » read more

Research Bits: Jan. 23
By Jesse Allen - 23 Jan, 2024 - Comments: 0

Memristor-based Bayesian neural network Researchers from CEA-Leti, CEA-List, and CNRS built a complete memristor-based Bayesian neural network implementation for classifying types of arrhythmia recordings with precise aleatoric and epistemic uncertainty. While Bayesian neural networks are useful for at sensory processing applications based on a small amount of noisy input data because they ... » read more

Developing ReRAM As Next Generation On-Chip Memory For Machine Learning, Image Processing And Other Advanced CPU Applications
By Brett Lowe - 18 Jan, 2024 - Comments: 0

In modern CPU device operation, 80% to 90% of energy consumption and timing delays are caused by the movement of data between the CPU and off-chip memory. To alleviate this performance concern, designers are adding additional on-chip memory to their CPUs. Traditionally, SRAM has been the most widely used on-chip CPU memory type. Unfortunately, SRAM is currently limited to a size of hundreds of ... » read more

How Is The Chip Industry Really Doing?
By Ed Sperling - 17 Jan, 2024 - Comments: 2

Throughout 2023, the general consensus among chip industry watchers was that IC sales were flat to down, fueled by market saturation for smart phones and PCs and excess inventory and capacity in DRAM and flash. But that doesn't tell the whole story, which is becoming highly nuanced and complicated. Unlike in the past, understanding how the chip industry is faring is no longer a simple math f... » read more

Scaling Server Memory Performance To Meet The Demands Of AI
By Tim Messegee - 11 Jan, 2024 - Comments: 0

AI, whether we’re talking about the number of parameters used in training or the size of large language models (LLMs), continues to grow at a breathtaking rate. For over a decade, we’ve witnessed a 10X per year scaling. It’s a growth rate that puts pressure on every aspect of the computing stack: processing, memory, networking, you name it. The platform vendors are responding to the in... » read more

SRAM’s Role In Emerging Memories
By Karen Heyman - 05 Jan, 2024 - Comments: 1

Experts at the Table — Part 3: Semiconductor Engineering sat down to talk about AI, the latest issues in SRAM, and the potential impact of new types of memory, with Tony Chan Carusone, CTO at Alphawave Semi; Steve Roddy, chief marketing officer at Quadric; and Jongsin Yun, memory technologist at Siemens EDA. What follows are excerpts of that conversation. Part one of this conversation can be ... » read more

Machine Learning Based MBIST Area Estimation
By Cadence - 03 Jan, 2024 - Comments: 0

Majority of the silicon with-in a design is occupied by memories. Memories are more prone to failures than logic due to their density. Several techniques have been established to target and detect defects within these memory instances and their interfacing logic. The most widely used approach is memory built-in self-test (MBIST) that inserts on-chip hardware unit(s) which provides systematic me... » read more

What You Needed To Know In 2023
By Brian Bailey - 21 Dec, 2023 - Comments: 0

I always use the last blog of the year to review everything published in the Systems & Design and Low Power – High Performance channels of Semiconductor Engineering, the two channels that I write for. It is useful to see what interests you and, as I have found in the past, it is an indicator of where the industry is going. You read about the issues you are facing as designers, and you nee... » read more

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