tag: Mentor Graphics

Consolidation And Innovation
By Ed Sperling - 16 Jun, 2015 - Comments: 0

Consolidation is happening across the semiconductor industry, in ways that are very apparent and others that aren't so obvious. On the chipmaker side, NXP's acquisition of Freescale, Avago's acquisition of Broadcom and LSI, and Intel's acquisition of Altera are so big that they require approval by multiple governments. Less obvious are moves such as Apple's build out of its processor team, a... » read more

SoC Integration Headaches Grow
By Ed Sperling - 16 Jun, 2015 - Comments: 0

As the number of IP blocks grows, so do the headaches of integrating the various pieces and making sure they perform as planned within a prescribed power envelope. This is easier said than done, particularly at the most advanced process nodes. There are more blocks, more power domains, more states and use-model dependencies, and there is much more contention for memories. There are physical ... » read more

New Directions For EDA
By Brian Bailey - 16 Jun, 2015 - Comments: 0

DAC is over and everyone is asking – what was the theme this year? It is sometimes difficult to make such a determination because quite often the theme has been there for some time, but suddenly appears more obvious than it did in the past. Some years it is a new product or class of products. The theme also can remain hidden, or disguised. As an example, people have been talking about the ... » read more

Analog’s Day Of Reckoning
By Brian Bailey - 16 Jun, 2015 - Comments: 0

The numbers being touted by the semiconductor industry for IoT edge devices are staggering. How they are going to be used, who will make them, or indeed who will make money from them are much less certain. The industry seems to be clear about the content of these devices. A small processor, some flash memory or possibly even some of the new memory technologies that are coming along, a radio ... » read more

Early Power Budgeting for Live Applications
By Meni Jayaswal - 16 Jun, 2015 - Comments: 0

Today, power and energy efficiency are at the forefront of SoC design. Functional activity has a first-order impact on power. Increasing functional integration requires a comprehensive analysis of power consumption across complex modes of operation. Power inefficiency in any one mode can have a significant impact on the competitiveness of a product or time to market. So designers are looking fo... » read more

Mentor, Cadence Join Forces
By Ed Sperling - 15 Jun, 2015 - Comments: 0

Mentor Graphics and Cadence have agreed to create a single binary interface for their respective simulation and emulation platforms, allowing debug tools from one vendor to run on the other's platforms. The two have invited [getentity id="22035" e_name="Synopsys"] to join their initiative, as well. So far, there is no decision. The move proposes a single API for both [getentity id="22032"... » read more

Power Usage Shift Leads To Methodology Shift
By Mentor, a Siemens Business - 15 Jun, 2015 - Comments: 0

Veloce offers a unique and customized flow for SoC power exploration and analysis. Veloce Power Application is enabling a methodology shift in the way power measurements are done to address the new requirements due to usage shift. Chip designers do not need to rely on functional test benches and extrapolation techniques to come up with power number. The new flow enables booting OS, running live... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 12 Jun, 2015 - Comments: 0

Christopher Rolland, an analyst at FBR, made a startling statement in a recent report. “At the pace of consolidation set thus far this year, 32% of all U.S. publicly traded semiconductor companies would be acquired in 2015! While this run-rate is not likely sustainable and should slow as the year progresses, we still expect ~15% consolidation rates for the remainder of this cycle (above low-t... » read more

The Week In Review: Design/IoT
By Jesse Allen - 12 Jun, 2015 - Comments: 0

Mergers & Acquisitions Synopsys announced Sunday it would acquire privately held formal verification provider Atrenta, for an undisclosed sum. That was followed quickly by Ansys' announcement that it would buy data analytics firm Gear Design Solutions. Tools IC Manage uncorked its big data predictive analytics tool Envision, which provides real-time design progress analytics to pre... » read more

DAC 2015: Day 3
By Brian Bailey - 10 Jun, 2015 - Comments: 0

The schedule for today revolves around eating and it is perfectly balanced between the big three. The morning starts with breakfast for the Cadence panel titled "Crossing the Great Divide: How to Safely Navigate the move from 28nm to 16FF+." The panel was moderated by Brian Fuller and panelists included Jayanta Lahiri from ARM, Afshin Montaz from Broadcom, Scott McCormack from Freescale, Yan... » read more

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