Week 37: Eliminating Glitches In The Matrix


As I’ve often stated, DAC is very much a team effort. Way back in week five I introduced Chuck Alpert, who is vice chair of the conference. Among other things, this title means Chuck will chair DAC 53 in Austin in 2016. Not that he hasn’t been busy with DAC 52. Chuck worked very hard to put together this year’s conference matrix, basically the overall conference schedule. It was big job, ... » read more

The Week In Review: Design/IoT


Deals Arteris teamed up with Yogitech to integrate the two companies' products. They're planning a set of ISO 26262 deliverables for a series of SoC reference designs and a functional safety assessment of the Arteris FlexNoC interconnect IP. ARM and Green Hills Software collaborated on an optimized compiler for the Cortex-R5 processor. The compiler achieved a score of 1.01EEMBC Automarks/... » read more

How To Extend Litho Scaling


IC mask [getkc id="80" comment="lithography"] today is sophisticated and complex. It's also a work in progress with a lot of unknowns as the industry struggles to increase productivity while reducing risk. The bulk of the work currently is focused on trying to figure out what would be a practical scheme for patterning lithography that could be used at 10nm and 7nm, said Gandharv Bhatara, Ca... » read more

Demonstrating The Benefits Of Source-Mask Optimization And Enabling Technologies Through Experiment And Simulations


In recent years the potential of Source-Mask Optimization (SMO) as an enabling technology for 22nm-and-beyond lithography has been explored and documented in the literature. It has been shown that intensive optimization of the fundamental degrees of freedom in the optical system allows for the creation of non-intuitive solutions in both the mask and the source, which leads to improved lithograp... » read more

Balancing On The Color Density Tightrope


Balancing on wobbly tightropes is something that chip designers get pretty good at. For instance, there is a fine balance between optimizing performance and minimizing leakage in a design layout. Dealing with the new requirements that multi-patterning (MP) introduces into a design flow creates many new tightropes to walk. I tiptoed out on one of the rarely talked about ones in my last article�... » read more

Blog Review: Feb. 18


Ansys' Justin Nescott digs up the top five engineering articles of the week. A thermal mapping microwave may make finding cold centers in nuked food a thing of the past. Plus, in hospitals your next meal might be delivered by a robot. Worried about your car being hacked? Maybe you should be. Mentor's John Day pulls out important points from the recent security report on wireless-enabled vehi... » read more

Week 36: A Trip To Houston


I have to admit it, I am impressed. Actually “impressed” doesn’t really capture it. I’m awed. On Friday we had the DAC Technical Program Committee (TPC) meeting in Houston—147 members of the TPC spent the day discussing the submitted papers. It was quite a scene. All of us were in one large room, with each big table representing one subcommittee. By the end of the day in Houston, the ... » read more

The Week In Review: Design/IoT


Mergers/Acquisitions ARM acquired Offspark, a Dutch company specializing in IoT communications security. Use of Offspark's PolarSSL embedded Transport Layer Security (TLS) solution is widespread in the IoT industry. PolarSSL will be rebranded mbed TLS and integrated into ARM's mbed OS. Tools Mentor Graphics is bringing together a suite of technologies that enable a multi-platform appro... » read more

Who Pays For EDA Shift Left?


While working on the predictions articles for 2015 (markets, design, semiconductors, tools and flows), a number of companies talked about the great shift left that is happening in the industry. What was surprising was the number of companies that mentioned it, and in very different ways. It is clear that shift left does not mean the same thing to all people. While they all see it addressing ... » read more

Emulation Uses Increase


For more than two decades, [getkc id="30" comment="emulation"] was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost. Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three [getkc id="7" kc_name="EDA"] companies. ... » read more

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