tag: mixed signal

Gaps Emerge In Test Flows
By Ed Sperling - 04 Aug, 2016 - Comments: 0

Gaps are showing up in test flows as chipmakers add more analog content and push into more safety-critical applications, exposing more points at which designs need to be tested as well as weaknesses in current tools and methodologies. The cornerstone of the [getkc id="76" kc_name="IoT"], and connected devices such as self-driving cars, is a heavy reliance on [getkc id="187" kc_name="sensors"... » read more

Mixed-signal/Low-power Design
By Jeff Dorsch - 03 Aug, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

What’s Holding Back Analog?
By Ann Mutschler - 01 Aug, 2016 - Comments: 2

The uneasy relationship between digital and analog, coupled with tools that are either ineffective or outright ignored by the analog community, may be limiting the growth potential and technological advances in that market. That certainly doesn’t mean analog isn’t growing. In fact, analog is an increasingly critical component of ICs and the electronic devices they inhabit. The global ele... » read more

Advanced Analog And Mixed Signal Design Continues Pushing The Design Envelope
By Paul Musto - 28 Jul, 2016 - Comments: 0

As PCB design has evolved into its present form with extremely complex boards housing high speed circuitry in very small areas, analog and mixed signal (AMS) and high speed analysis can address the latest design challenges. Analog/mixed signal design More and more products incorporate more than just digital circuitry. The vast majority of products now integrate digital and analog circuitr... » read more

What’s Next For UVM?
By Brian Bailey - 28 Jul, 2016 - Comments: 0

The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to deal with heterogeneous integration, more customization, and increased complexity. Verification methodologies started appearing soon after the release of SystemVerilog. Initially they were inten... » read more

Mixed-signal/Low-power Design
By Jeff Dorsch - 26 Jul, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

Addressing The Challenges Of Automotive Motor Control
By Ahmed Eisawy - 14 Jul, 2016 - Comments: 0

By Andrew Talan and Ahmed Eisawy As you leave work today and enter the parking lot, you hit the unlock button on your car remote. Using the power lift to open the hatch back, you put your laptop bag in the back of the car. While seated in the car, you adjust your seat position and bump your driver-side mirror into a new position and then head for home. You probably don’t think much about y... » read more

Mixed-Signal/Low-Power Design
By Jeff Dorsch - 14 Jul, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

A New Approach For IC Test
By NI - 22 Jun, 2016 - Comments: 0

Since its inception, a founding principle of the semiconductor industry has been to continually improve performance while driving down cost. In other words, offer more for the money. However, amid greater device complexity, shorter product cycles, and relentless cost pressure, the test portion represents an increasing percentage of the total IC cost and a significant part of the product develop... » read more

DAC Day Two: Down To Business
By Brian Bailey - 07 Jun, 2016 - Comments: 0

DAC day two started with a breakfast presentation put on by Synopsys which included guests from ARM, TSMC and HiSilicon. It was titled Collaborating to Enable Design with the latest processors and finFET processes. Collaboration is a word that we hear increasingly when talking about the advanced nodes and today we are truly at the point where one company cannot do it all. Ron Moore, VP of ma... » read more

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